diff --git a/targets/ESP32/_nanoCLR/nanoFramework.Hardware.Esp32.Rmt/nanoFramework_hardware_esp32_rmt_native.cpp b/targets/ESP32/_nanoCLR/nanoFramework.Hardware.Esp32.Rmt/nanoFramework_hardware_esp32_rmt_native.cpp index d3da369115..730a46f6f5 100644 --- a/targets/ESP32/_nanoCLR/nanoFramework.Hardware.Esp32.Rmt/nanoFramework_hardware_esp32_rmt_native.cpp +++ b/targets/ESP32/_nanoCLR/nanoFramework.Hardware.Esp32.Rmt/nanoFramework_hardware_esp32_rmt_native.cpp @@ -130,6 +130,7 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, + NULL, Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_TransmitterChannel::NativeTxInit___I4, Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_TransmitterChannel::NativeTxGetIsChannelIdle___BOOLEAN, Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_TransmitterChannel::NativeTxSetLoopingMode___VOID__BOOLEAN, @@ -146,7 +147,7 @@ static const CLR_RT_MethodHandler method_lookup[] = const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_nanoFramework_Hardware_Esp32_Rmt = { "nanoFramework.Hardware.Esp32.Rmt", - 0x054E7D74, + 0x8ADAC728, method_lookup, { 100, 0, 5, 1 } }; diff --git a/targets/ESP32/_nanoCLR/nanoFramework.Hardware.Esp32.Rmt/nanoFramework_hardware_esp32_rmt_native.h b/targets/ESP32/_nanoCLR/nanoFramework.Hardware.Esp32.Rmt/nanoFramework_hardware_esp32_rmt_native.h index 3992220693..481feb40b8 100644 --- a/targets/ESP32/_nanoCLR/nanoFramework.Hardware.Esp32.Rmt/nanoFramework_hardware_esp32_rmt_native.h +++ b/targets/ESP32/_nanoCLR/nanoFramework.Hardware.Esp32.Rmt/nanoFramework_hardware_esp32_rmt_native.h @@ -31,6 +31,18 @@ typedef enum __nfpack SourceClock SourceClock_REF = 1, } SourceClock; +struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_RmtChannelSettings +{ + static const int FIELD___channel = 1; + static const int FIELD___pinNumber = 2; + static const int FIELD___clockDivider = 3; + static const int FIELD___numberOfMemoryBlocks = 4; + static const int FIELD___bufferSize = 5; + static const int FIELD___signalInverterEnabled = 6; + + //--// +}; + struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_RmtCommand { static const int FIELD___level0 = 1; @@ -101,18 +113,6 @@ struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Es static CLR_INT32 FindNextChannel(); }; -struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_RmtChannelSettings -{ - static const int FIELD___channel = 1; - static const int FIELD___pinNumber = 2; - static const int FIELD___clockDivider = 3; - static const int FIELD___numberOfMemoryBlocks = 4; - static const int FIELD___bufferSize = 5; - static const int FIELD___signalInverterEnabled = 6; - - //--// -}; - struct Library_nanoFramework_hardware_esp32_rmt_native_nanoFramework_Hardware_Esp32_Rmt_TransmitChannelSettings { static const int FIELD___enableCarrierWave = 7;