x86/insns.dat: Fix {er} usage on EVEX vcvtsi2* instructions

The rounding specifier should be applied to src2, not src1.

Furthermore, VCVTSI2SD with a 32-bit source operand does not
support specifying a rounding mode (as no rounding can occur).

Signed-off-by: Henrik Gramner <[email protected]>
[ hpa: manual merge ]
Signed-off-by: H. Peter Anvin (Intel) <[email protected]>

Author: Gramner

x86/insns.dat

@@ -3586,10 +3586,10 @@ VCVTSD2SI       reg64,xmmrm64|er                    [rm:t1f64: evex.128.f2.0f.w1
 VCVTSD2SS       xmmreg|mask|z,xmmreg,xmmrm64|er     [rvm:t1s: evex.nds.lig.f2.0f.w1 5a /r ] AVX512
 VCVTSD2USI      reg32,xmmrm64|er                    [rm:t1f64: evex.128.f2.0f.w0 79 /r ] AVX512
 VCVTSD2USI      reg64,xmmrm64|er                    [rm:t1f64: evex.128.f2.0f.w1 79 /r ] AVX512
-VCVTSI2SD       xmmreg,xmmreg|er,rm32               [rvm:t1s: evex.nds.lig.f2.0f.w0 2a /r ] AVX512
-VCVTSI2SD       xmmreg,xmmreg|er,rm64               [rvm:t1s: evex.nds.lig.f2.0f.w1 2a /r ] AVX512
-VCVTSI2SS       xmmreg,xmmreg|er,rm32               [rvm:t1s: evex.nds.lig.f3.0f.w0 2a /r ] AVX512
-VCVTSI2SS       xmmreg,xmmreg|er,rm64               [rvm:t1s: evex.nds.lig.f3.0f.w1 2a /r ] AVX512
+VCVTSI2SD       xmmreg,xmmreg,rm32                  [rvm:t1s: evex.nds.lig.f2.0f.w0 2a /r ] AVX512
+VCVTSI2SD       xmmreg,xmmreg,rm64|er               [rvm:t1s: evex.nds.lig.f2.0f.w1 2a /r ] AVX512
+VCVTSI2SS       xmmreg,xmmreg,rm32|er               [rvm:t1s: evex.nds.lig.f3.0f.w0 2a /r ] AVX512
+VCVTSI2SS       xmmreg,xmmreg,rm64|er               [rvm:t1s: evex.nds.lig.f3.0f.w1 2a /r ] AVX512
 VCVTSS2SD       xmmreg|mask|z,xmmreg,xmmrm32|sae    [rvm:t1s: evex.nds.lig.f3.0f.w0 5a /r ] AVX512
 VCVTSS2SI       reg32,xmmrm32|er                    [rm:t1f32: evex.128.f3.0f.w0 2d /r ] AVX512
 VCVTSS2SI       reg64,xmmrm32|er                    [rm:t1f32: evex.128.f3.0f.w1 2d /r ] AVX512