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AMX-TRANSPOSE removed
All the 16 AMX-TRANSPOSE instructions were removed from the 59th edition of "Intel Architecture Instruction Set Extensions and Future Features Programming Reference" September 2025, 319433-059. Similar to PCOMMIT, they are tagged as 'NEVER'
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3 files changed

+64
-60
lines changed

3 files changed

+64
-60
lines changed

‎test/amx.asm‎

Lines changed: 47 additions & 42 deletions
Original file line numberDiff line numberDiff line change
@@ -56,48 +56,53 @@
5656
tilemovrow zreg, treg, eax ;AMX-AVX512
5757
tilemovrow zreg, treg, %1 ;AMX-AVX512
5858

59-
t2rpntlvwz0 treg, [rax] ;AMX-TRANSPOSE
60-
t2rpntlvwz0 treg, [rax+rdx] ;AMX-TRANSPOSE
61-
t2rpntlvwz0 treg, [rax+rdx*2] ;AMX-TRANSPOSE
62-
63-
t2rpntlvwz0t1 treg, [rax] ;AMX-TRANSPOSE
64-
t2rpntlvwz0t1 treg, [rax+rdx] ;AMX-TRANSPOSE
65-
t2rpntlvwz0t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE
66-
67-
t2rpntlvwz1 treg, [rax] ;AMX-TRANSPOSE
68-
t2rpntlvwz1 treg, [rax+rdx] ;AMX-TRANSPOSE
69-
t2rpntlvwz1 treg, [rax+rdx*2] ;AMX-TRANSPOSE
70-
71-
t2rpntlvwz1t1 treg, [rax] ;AMX-TRANSPOSE
72-
t2rpntlvwz1t1 treg, [rax+rdx] ;AMX-TRANSPOSE
73-
t2rpntlvwz1t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE
74-
75-
ttransposed treg, treg ;AMX-TRANSPOSE
76-
77-
t2rpntlvwz0rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
78-
t2rpntlvwz0rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
79-
t2rpntlvwz0rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
80-
81-
t2rpntlvwz0rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
82-
t2rpntlvwz0rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
83-
t2rpntlvwz0rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
84-
85-
t2rpntlvwz1rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
86-
t2rpntlvwz1rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
87-
t2rpntlvwz1rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
88-
89-
t2rpntlvwz1rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
90-
t2rpntlvwz1rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
91-
t2rpntlvwz1rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
92-
93-
ttdpbf16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-BF16
94-
ttdpfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-FP16
95-
ttcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
96-
ttcmmrlfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
97-
tconjtcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
98-
tconjtfp16 treg, treg ;AMX-TRANSPOSE + AMX-COMPLEX
99-
100-
ttmmultf32ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX_TF32
59+
; All the 16 AMX-TRANSPOSE instructions were removed from the 59th edition of
60+
; "Intel Architecture Instruction Set Extensions and Future Features Programming Reference"
61+
; September 2025, 319433-059
62+
; Similar to PCOMMIT, they are tagged as 'NEVER'
63+
;
64+
;t2rpntlvwz0 treg, [rax] ;AMX-TRANSPOSE
65+
;t2rpntlvwz0 treg, [rax+rdx] ;AMX-TRANSPOSE
66+
;t2rpntlvwz0 treg, [rax+rdx*2] ;AMX-TRANSPOSE
67+
68+
;t2rpntlvwz0t1 treg, [rax] ;AMX-TRANSPOSE
69+
;t2rpntlvwz0t1 treg, [rax+rdx] ;AMX-TRANSPOSE
70+
;t2rpntlvwz0t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE
71+
72+
;t2rpntlvwz1 treg, [rax] ;AMX-TRANSPOSE
73+
;t2rpntlvwz1 treg, [rax+rdx] ;AMX-TRANSPOSE
74+
;t2rpntlvwz1 treg, [rax+rdx*2] ;AMX-TRANSPOSE
75+
76+
;t2rpntlvwz1t1 treg, [rax] ;AMX-TRANSPOSE
77+
;t2rpntlvwz1t1 treg, [rax+rdx] ;AMX-TRANSPOSE
78+
;t2rpntlvwz1t1 treg, [rax+rdx*2] ;AMX-TRANSPOSE
79+
80+
;ttransposed treg, treg ;AMX-TRANSPOSE
81+
82+
;t2rpntlvwz0rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
83+
;t2rpntlvwz0rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
84+
;t2rpntlvwz0rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
85+
86+
;t2rpntlvwz0rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
87+
;t2rpntlvwz0rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
88+
;t2rpntlvwz0rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
89+
90+
;t2rpntlvwz1rs treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
91+
;t2rpntlvwz1rs treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
92+
;t2rpntlvwz1rs treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
93+
94+
;t2rpntlvwz1rst1 treg, [rax] ;AMX-TRANSPOSE + AMX-MOVRS
95+
;t2rpntlvwz1rst1 treg, [rax+rdx] ;AMX-TRANSPOSE + AMX-MOVRS
96+
;t2rpntlvwz1rst1 treg, [rax+rdx*2] ;AMX-TRANSPOSE + AMX-MOVRS
97+
98+
;ttdpbf16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-BF16
99+
;ttdpfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-FP16
100+
;ttcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
101+
;ttcmmrlfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
102+
;tconjtcmmimfp16ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX-COMPLEX
103+
;tconjtfp16 treg, treg ;AMX-TRANSPOSE + AMX-COMPLEX
104+
105+
;ttmmultf32ps treg, treg2, treg3 ;AMX-TRANSPOSE + AMX_TF32
101106

102107
tilestored [rax], treg ;AMX_TILE
103108
tilestored [rax,rdx], treg ;AMX_TILE

‎x86/iflags.ph‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -162,7 +162,6 @@ if_("AMXINT8", "AMX 8-bit integer multiplication");
162162
if_("AMXCOMPLEX", "AMX float16 complex multiplication");
163163
if_("AMXAVX512", "EVEX zmm<-tmm conversion instructions");
164164
if_("AMXMOVRS", "AMX loads with MOVRS hint");
165-
if_("AMXTRANSPOSE", "AMX transpose instructions");
166165
if_("FRED", "Flexible Return and Exception Delivery (FRED)");
167166
if_("RAOINT", "Remote atomic operations (RAO-INT)");
168167
if_("UINTR", "User interrupts");

‎x86/insns.dat‎

Lines changed: 17 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -5401,17 +5401,17 @@ TILEZERO tmmreg [r: vex.128.f2.0f38.w0 49 /3r0] AMXTILE,LONG
54015401
TILELOADDRS tmmreg,mem [rm: vex+.128.f2.0f38.w0 4a /r] AMXMOVRS,APX,AMXTILE,FUTURE,MIB,SIB,ANYSIZE,AR1,LONG
54025402
TILELOADDRST1 tmmreg,mem [rm: vex+.128.66.0f38.w0 4a /r] AMXMOVRS,APX,AMXTILE,FUTURE,MIB,SIB,ANYSIZE,AR1,LONG
54035403

5404-
T2RPNTLVWZ0 tmmreg,mem [rm: vex.128.np.0f38.w0 6e /r] FUTURE,SIB
5405-
T2RPNTLVWZ0T1 tmmreg,mem [rm: vex.128.np.0f38.w0 6f /r] FUTURE,SIB
5406-
T2RPNTLVWZ1 tmmreg,mem [rm: vex.128.66.0f38.w0 6e /r] FUTURE,SIB
5407-
T2RPNTLVWZ1T1 tmmreg,mem [rm: vex.128.66.0f38.w0 6f /r] FUTURE,SIB
5408-
T2RPNTLVWZ0RS tmmreg,mem [rm: vex.128.np.map5.w0 f8 /r] FUTURE,SIB
5409-
T2RPNTLVWZ0RST1 tmmreg,mem [rm: vex.128.np.map5.w0 f9 /r] FUTURE,SIB
5410-
T2RPNTLVWZ1RS tmmreg,mem [rm: vex.128.66.map5.w0 f8 /r] FUTURE,SIB
5411-
T2RPNTLVWZ1RST1 tmmreg,mem [rm: vex.128.66.map5.w0 f9 /r] FUTURE,SIB
5412-
5413-
TCONJTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 6b /r] FUTURE
5414-
TCONJTFP16 tmmreg,tmmreg [rm: vex.128.66.0f38.w0 6b /r] FUTURE
5404+
T2RPNTLVWZ0 tmmreg,mem [rm: vex.128.np.0f38.w0 6e /r] NEVER,SIB
5405+
T2RPNTLVWZ0T1 tmmreg,mem [rm: vex.128.np.0f38.w0 6f /r] NEVER,SIB
5406+
T2RPNTLVWZ1 tmmreg,mem [rm: vex.128.66.0f38.w0 6e /r] NEVER,SIB
5407+
T2RPNTLVWZ1T1 tmmreg,mem [rm: vex.128.66.0f38.w0 6f /r] NEVER,SIB
5408+
T2RPNTLVWZ0RS tmmreg,mem [rm: vex.128.np.map5.w0 f8 /r] NEVER,SIB
5409+
T2RPNTLVWZ0RST1 tmmreg,mem [rm: vex.128.np.map5.w0 f9 /r] NEVER,SIB
5410+
T2RPNTLVWZ1RS tmmreg,mem [rm: vex.128.66.map5.w0 f8 /r] NEVER,SIB
5411+
T2RPNTLVWZ1RST1 tmmreg,mem [rm: vex.128.66.map5.w0 f9 /r] NEVER,SIB
5412+
5413+
TCONJTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 6b /r] NEVER
5414+
TCONJTFP16 tmmreg,tmmreg [rm: vex.128.66.0f38.w0 6b /r] NEVER
54155415
TCVTROWD2PS zmmreg,tmmreg,reg32 [rmv: evex.512.f3.0f38.w0 4a /r] AMXAVX512
54165416
TCVTROWD2PS zmmreg,tmmreg,imm8 [rmi: evex.512.f3.0f3a.w0 07 /r ib] AMXAVX512
54175417
TCVTROWPS2BF16H zmmreg,tmmreg,reg32 [rmv: evex.512.f2.0f38.w0 6d /r] AMXAVX512
@@ -5429,12 +5429,12 @@ TDPHF8PS tmmreg,tmmreg,tmmreg [rmv: vex.128.66.map5.w0 fd /r] AMXFP8
54295429
TILEMOVROW zmmreg,tmmreg,imm8 [rmi: evex.512.66.0f3a.w0 07 /r ib] AMXAVX512
54305430
TILEMOVROW zmmreg,tmmreg,reg32 [rmv: evex.512.66.0f38.w0 4a /r] AMXAVX512
54315431
TMMULTF32PS tmmreg,tmmreg,tmmreg [rmv: vex.128.66.0f38.w0 48 /r] AMXTF32
5432-
TTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6b /r] FUTURE
5433-
TTCMMRLFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6b /r] FUTURE
5434-
TTDPBF16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6c /r] FUTURE
5435-
TTDPFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6c /r] FUTURE
5436-
TTMMULTF32PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 48 /r] FUTURE
5437-
TTRANSPOSED tmmreg,tmmreg [rm: vex.128.f3.0f38.w0 5f /r] FUTURE
5432+
TTCMMIMFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6b /r] NEVER
5433+
TTCMMRLFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6b /r] NEVER
5434+
TTDPBF16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f3.0f38.w0 6c /r] NEVER
5435+
TTDPFP16PS tmmreg,tmmreg,tmmreg [rmv: vex.128.f2.0f38.w0 6c /r] NEVER
5436+
TTMMULTF32PS tmmreg,tmmreg,tmmreg [rmv: vex.128.np.0f38.w0 48 /r] NEVER
5437+
TTRANSPOSED tmmreg,tmmreg [rm: vex.128.f3.0f38.w0 5f /r] NEVER
54385438

54395439
;# Intel AVX512-FP16 instructions
54405440
VADDPH xmmreg|mask|z,xmmreg*,xmmrm128|b16 [rvm:fv: evex.nds.128.np.map5.w0 58 /r] AVX512FP16,AVX512VL

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