x86/insns.dat: SHA512-NI VEX support

Add support for VEX-encoded SHA512-NI instructions.

Signed-off-by: Tomasz Kantecki <[email protected]>
Signed-off-by: H. Peter Anvin <[email protected]>

Author: tkanteck

test/sha-64.asm

@@ -28,3 +28,6 @@ BITS 64
 	sha256msg2 xmm2, [rax]
 	sha256msg2 xmm3, [rax+0x12]
 	sha256msg2 xmm4, [rax+rbx*2]
+	vsha512rnds2 ymm1, ymm2, xmm0
+	vsha512msg1 ymm1, xmm2
+	vsha512msg2 ymm1, ymm2

test/sha.asm

@@ -29,3 +29,6 @@ BITS 32
 	sha256msg2 xmm2, [eax]
 	sha256msg2 xmm3, [eax+0x12]
 	sha256msg2 xmm4, [eax+ebx*2]
+	vsha512rnds2 ymm1, ymm2, xmm0
+	vsha512msg1 ymm1, xmm2
+	vsha512msg2 ymm1, ymm2

x86/iflags.ph

@@ -112,6 +112,7 @@ if_("AVXVNNIINT8",       "AVX Vector Neural Network 8-bit integer instructions")
 if_("AVXIFMA",           "AVX integer multiply and add");
 if_("HRESET",            "History reset");
 if_("SMAP",		 "Supervisor Mode Access Prevention (SMAP)");
+if_("SHA512",            "SHA512 instructions");
 
 # Put these last to minimize their relevance
 if_("OBSOLETE",          "Instruction removed from architecture");

x86/insns.dat

@@ -3587,6 +3587,9 @@ SHA256MSG1      xmmreg,xmmrm128                     [rm: 0f 38 cc /r ] SHA,FUTUR
 SHA256MSG2      xmmreg,xmmrm128                     [rm: 0f 38 cd /r ] SHA,FUTURE
 SHA256RNDS2     xmmreg,xmmrm128,xmm0                [rm-: 0f 38 cb /r ] SHA,FUTURE
 SHA256RNDS2     xmmreg,xmmrm128                     [rm:  0f 38 cb /r ] SHA,FUTURE
+VSHA512MSG1     ymmreg,xmmreg                       [rm: vex.256.f2.0f38.w0 cc /r] SHA512,AVX,FUTURE
+VSHA512MSG2     ymmreg,ymmreg                       [rm: vex.256.f2.0f38.w0 cd /r] SHA512,AVX,FUTURE
+VSHA512RNDS2    ymmreg,ymmreg,xmmreg                [rvm: vex.nds.256.f2.0f38.w0 cb /r] SHA512,AVX,FUTURE
 
 ;# AVX no exception conversions
 ; Must precede AVX-512 versions