@@ -595,15 +595,16 @@ static bool jmp_match(int32_t segment, int64_t offset, int bits,
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/* jmp short (opcode eb) cannot be used with bnd prefix. */
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ins -> prefixes [PPS_REP ] = P_none ;
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/*!
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- *!bnd [on] invalid BND prefixes
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+ *!prefix-bnd [on] invalid BND prefix
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+ *!=bnd
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*! warns about ineffective use of the \c{BND} prefix when the
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*! \c{JMP} instruction is converted to the \c{SHORT} form.
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*! This should be extremely rare since the short \c{JMP} only
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*! is applicable to jumps inside the same module, but if
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*! it is legitimate, it may be necessary to use
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*! \c{bnd jmp dword}.
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*/
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- nasm_warn (WARN_BND | ERR_PASS2 ,
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+ nasm_warn (WARN_PREFIX_BND | ERR_PASS2 ,
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"jmp short does not init bnd regs - bnd prefix dropped" );
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}
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@@ -1203,7 +1204,8 @@ static void bad_hle_warn(const insn * ins, uint8_t hleok)
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ww = w_inval ; /* HLE requires operand 0 to be memory */
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/*!
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- *!hle [on] invalid HLE prefixes
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+ *!prefix-hle [on] invalid HLE prefix
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+ *!=hle
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*! warns about invalid use of the HLE \c{XACQUIRE} or \c{XRELEASE}
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*! prefixes.
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*/
@@ -1213,14 +1215,14 @@ static void bad_hle_warn(const insn * ins, uint8_t hleok)
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case w_lock :
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if (ins -> prefixes [PPS_LOCK ] != P_LOCK ) {
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- nasm_warn (WARN_HLE | ERR_PASS2 ,
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+ nasm_warn (WARN_PREFIX_HLE | ERR_PASS2 ,
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"%s with this instruction requires lock" ,
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prefix_name (rep_pfx ));
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}
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break ;
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case w_inval :
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- nasm_warn (WARN_HLE | ERR_PASS2 ,
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+ nasm_warn (WARN_PREFIX_HLE | ERR_PASS2 ,
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"%s invalid with this instruction" ,
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prefix_name (rep_pfx ));
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break ;
@@ -1423,11 +1425,17 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
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case 0320 :
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{
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+ /*! prefix-opsize [on] invalid operand size prefix
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+ *! warns that an operand prefix (\c{o16}, \c{o32}, \c{o64},
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+ *! \c{osp}) invalid for the specified instruction has been specified.
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+ *! The operand prefix will be ignored by the assembler.
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+ */
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enum prefixes pfx = ins -> prefixes [PPS_OSIZE ];
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if (pfx == P_O16 )
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break ;
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if (pfx != P_none )
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- nasm_warn (WARN_OTHER |ERR_PASS2 , "invalid operand size prefix" );
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+ nasm_warn (WARN_PREFIX_OPSIZE |ERR_PASS2 ,
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+ "invalid operand size prefix, must be o16" );
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else
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ins -> prefixes [PPS_OSIZE ] = P_O16 ;
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break ;
@@ -1439,7 +1447,8 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
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if (pfx == P_O32 )
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break ;
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if (pfx != P_none )
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- nasm_warn (WARN_OTHER |ERR_PASS2 , "invalid operand size prefix" );
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+ nasm_warn (WARN_PREFIX_OPSIZE |ERR_PASS2 ,
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+ "invalid operand size prefix, must be o32" );
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else
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ins -> prefixes [PPS_OSIZE ] = P_O32 ;
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break ;
@@ -1493,11 +1502,22 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
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break ;
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case 0340 :
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+ /*!
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+ *!forward [on] forward reference may have unpredictable results
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+ *! warns that a forward reference is used which may have
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+ *! unpredictable results, notably in a \c{RESB}-type
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+ *! pseudo-instruction. These would be \i\e{critical
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+ *! expressions} (see \k{crit}) but are permitted in a
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+ *! handful of cases for compatibility with older
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+ *! versions of NASM. This warning should be treated as a
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+ *! severe programming error as the code could break at
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+ *! any time for any number of reasons.
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+ */
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if (!absolute_op (& ins -> oprs [0 ]))
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nasm_nonfatal ("attempt to reserve non-constant"
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" quantity of BSS space" );
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else if (ins -> oprs [0 ].opflags & OPFLAG_FORWARD )
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- nasm_warn (WARN_OTHER , "forward reference in RESx "
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+ nasm_warn (WARN_FORWARD , "forward reference in RESx "
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"can have unpredictable results" );
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else
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length += ins -> oprs [0 ].offset * resb_bytes (ins -> opcode );
@@ -1723,10 +1743,11 @@ static int64_t calcsize(int32_t segment, int64_t offset, int bits,
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if (has_prefix (ins , PPS_LOCK , P_LOCK ) && lockcheck &&
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(!itemp_has (temp ,IF_LOCK ) || !is_class (MEMORY , ins -> oprs [0 ].type ))) {
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/*!
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- *!lock [on] LOCK prefix on unlockable instructions
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+ *!prefix-lock [on] LOCK prefix on unlockable instructions
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+ *!=lock
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*! warns about \c{LOCK} prefixes on unlockable instructions.
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*/
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- nasm_warn (WARN_LOCK | ERR_PASS2 , "instruction is not lockable" );
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+ nasm_warn (WARN_PREFIX_LOCK | ERR_PASS2 , "instruction is not lockable" );
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}
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bad_hle_warn (ins , hleok );
@@ -1788,20 +1809,26 @@ static int emit_prefix(struct out_data *data, const int bits, insn *ins)
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c = 0xF3 ;
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break ;
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case R_CS :
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+ /*!
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+ *!prefix-seg [on] segment prefix ignored in 64-bit mode
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+ *! warns that an \c{es}, \c{cs}, \c{ss} or \c{ds} segment override
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+ *! prefix has no effect in 64-bit mode. The prefix will still be
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+ *! generated as requested.
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+ */
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if (bits == 64 )
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- nasm_warn (WARN_OTHER |ERR_PASS2 , "cs segment base generated, "
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+ nasm_warn (WARN_PREFIX_SEG |ERR_PASS2 , "cs segment base generated, "
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"but will be ignored in 64-bit mode" );
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c = 0x2E ;
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break ;
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case R_DS :
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if (bits == 64 )
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- nasm_warn (WARN_OTHER |ERR_PASS2 , "ds segment base generated, "
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+ nasm_warn (WARN_PREFIX_SEG |ERR_PASS2 , "ds segment base generated, "
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"but will be ignored in 64-bit mode" );
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c = 0x3E ;
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break ;
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case R_ES :
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if (bits == 64 )
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- nasm_warn (WARN_OTHER |ERR_PASS2 , "es segment base generated, "
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+ nasm_warn (WARN_PREFIX_SEG |ERR_PASS2 , "es segment base generated, "
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"but will be ignored in 64-bit mode" );
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c = 0x26 ;
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break ;
@@ -1813,7 +1840,7 @@ static int emit_prefix(struct out_data *data, const int bits, insn *ins)
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break ;
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case R_SS :
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if (bits == 64 ) {
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- nasm_warn (WARN_OTHER |ERR_PASS2 , "ss segment base generated, "
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+ nasm_warn (WARN_PREFIX_SEG |ERR_PASS2 , "ss segment base generated, "
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"but will be ignored in 64-bit mode" );
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}
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c = 0x36 ;
@@ -2013,7 +2040,7 @@ static void gencode(struct out_data *data, insn *ins)
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nasm_nonfatal ("non-absolute expression not permitted "
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"as argument %d" , c & 7 );
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else if (opy -> offset & ~mask )
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- nasm_warn (ERR_PASS2 | WARN_NUMBER_OVERFLOW ,
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+ nasm_warn (ERR_PASS2 | WARN_NUMBER_OVERFLOW ,
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"is4 argument exceeds bounds" );
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c = opy -> offset & mask ;
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goto emit_is4 ;
@@ -2035,7 +2062,7 @@ static void gencode(struct out_data *data, insn *ins)
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case4 (0254 ):
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if (absolute_op (opx ) &&
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(int32_t )opx -> offset != (int64_t )opx -> offset ) {
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- nasm_warn (ERR_PASS2 | WARN_NUMBER_OVERFLOW ,
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+ nasm_warn (ERR_PASS2 | WARN_NUMBER_OVERFLOW ,
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"signed dword immediate exceeds bounds" );
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}
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out_imm (data , opx , 4 , OUT_SIGNED );
@@ -2105,7 +2132,7 @@ static void gencode(struct out_data *data, insn *ins)
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/* If this wasn't explicitly byte-sized, warn as though we
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* had fallen through to the imm16/32/64 case.
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*/
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- nasm_warn (ERR_PASS2 | WARN_NUMBER_OVERFLOW ,
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+ nasm_warn (ERR_PASS2 | WARN_NUMBER_OVERFLOW ,
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"%s value exceeds bounds" ,
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(opx -> type & BITS8 ) ? "signed byte" :
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s == 16 ? "word" :
@@ -2847,9 +2874,15 @@ static int process_ea(operand *input, ea *output, int bits,
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input -> type |= IP_REL ;
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}
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if ((input -> type & IP_REL ) == IP_REL ) {
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+ /*!
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+ *!ea-absolute [on] absolute address cannot be RIP-relative
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+ *! warns that an address that is inherently absolute cannot
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+ *! be generated with RIP-relative encoding using \c{REL},
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+ *! see \k{REL & ABS}.
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+ */
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if (input -> segment == NO_SEG ||
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(input -> opflags & OPFLAG_RELATIVE )) {
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- nasm_warn (WARN_OTHER |ERR_PASS2 ,
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+ nasm_warn (WARN_EA_ABSOLUTE |ERR_PASS2 ,
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"absolute address can not be RIP-relative" );
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input -> type &= ~IP_REL ;
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input -> type |= MEMORY ;
@@ -2864,8 +2897,15 @@ static int process_ea(operand *input, ea *output, int bits,
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if (eaflags & EAF_BYTEOFFS ||
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(eaflags & EAF_WORDOFFS &&
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- input -> disp_size != (addrbits != 16 ? 32 : 16 )))
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- nasm_warn (WARN_OTHER , "displacement size ignored on absolute address" );
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+ input -> disp_size != (addrbits != 16 ? 32 : 16 ))) {
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+ /*!
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+ *!ea-dispsize [on] displacement size ignored on absolute address
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+ *! warns that NASM does not support generating displacements for
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+ *! inherently absolute addresses that do not match the address size
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+ *! of the instruction.
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+ */
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+ nasm_warn (WARN_EA_DISPSIZE , "displacement size ignored on absolute address" );
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+ }
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if ((eaflags & EAF_SIB ) || (bits == 64 && (~input -> type & IP_REL ))) {
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output -> sib_present = true;
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