reduce continuous digital output examples timing from 1kHz to 10Hz

Author: Mike Prosser

examples/digital_out/cont_gen_dig_port_int_clk.py

@@ -11,7 +11,7 @@
     data = [1, 2, 4, 8, 16, 32, 64, 128]
 
     task.do_channels.add_do_chan("Dev1/port0", line_grouping=LineGrouping.CHAN_FOR_ALL_LINES)
-    task.timing.cfg_samp_clk_timing(1000.0, sample_mode=AcquisitionType.CONTINUOUS)
+    task.timing.cfg_samp_clk_timing(10.0, sample_mode=AcquisitionType.CONTINUOUS)
     task.write(data)
     task.start()
 

examples/digital_out/cont_gen_dig_port_int_clk_wfm.py

@@ -14,7 +14,7 @@
 
 with nidaqmx.Task() as task:
     task.do_channels.add_do_chan("Dev1/port0", line_grouping=LineGrouping.CHAN_FOR_ALL_LINES)
-    task.timing.cfg_samp_clk_timing(1000.0, sample_mode=AcquisitionType.CONTINUOUS)
+    task.timing.cfg_samp_clk_timing(10.0, sample_mode=AcquisitionType.CONTINUOUS)
 
     sample_count = 50
     signal_count = task.do_channels[0].do_num_lines