|
14 | 14 | */ |
15 | 15 |
|
16 | 16 | #include <linux/clk.h> |
| 17 | +#include <linux/cleanup.h> |
17 | 18 | #include <linux/debugfs.h> |
18 | 19 | #include <linux/delay.h> |
19 | 20 | #include <linux/export.h> |
@@ -270,7 +271,7 @@ struct tegra_msi { |
270 | 271 | DECLARE_BITMAP(used, INT_PCI_MSI_NR); |
271 | 272 | struct irq_domain *domain; |
272 | 273 | struct mutex map_lock; |
273 | | - spinlock_t mask_lock; |
| 274 | + raw_spinlock_t mask_lock; |
274 | 275 | void *virt; |
275 | 276 | dma_addr_t phys; |
276 | 277 | int irq; |
@@ -1581,29 +1582,27 @@ static void tegra_msi_irq_mask(struct irq_data *d) |
1581 | 1582 | struct tegra_msi *msi = irq_data_get_irq_chip_data(d); |
1582 | 1583 | struct tegra_pcie *pcie = msi_to_pcie(msi); |
1583 | 1584 | unsigned int index = d->hwirq / 32; |
1584 | | - unsigned long flags; |
1585 | 1585 | u32 value; |
1586 | 1586 |
|
1587 | | - spin_lock_irqsave(&msi->mask_lock, flags); |
1588 | | - value = afi_readl(pcie, AFI_MSI_EN_VEC(index)); |
1589 | | - value &= ~BIT(d->hwirq % 32); |
1590 | | - afi_writel(pcie, value, AFI_MSI_EN_VEC(index)); |
1591 | | - spin_unlock_irqrestore(&msi->mask_lock, flags); |
| 1587 | + scoped_guard(raw_spinlock_irqsave, &msi->mask_lock) { |
| 1588 | + value = afi_readl(pcie, AFI_MSI_EN_VEC(index)); |
| 1589 | + value &= ~BIT(d->hwirq % 32); |
| 1590 | + afi_writel(pcie, value, AFI_MSI_EN_VEC(index)); |
| 1591 | + } |
1592 | 1592 | } |
1593 | 1593 |
|
1594 | 1594 | static void tegra_msi_irq_unmask(struct irq_data *d) |
1595 | 1595 | { |
1596 | 1596 | struct tegra_msi *msi = irq_data_get_irq_chip_data(d); |
1597 | 1597 | struct tegra_pcie *pcie = msi_to_pcie(msi); |
1598 | 1598 | unsigned int index = d->hwirq / 32; |
1599 | | - unsigned long flags; |
1600 | 1599 | u32 value; |
1601 | 1600 |
|
1602 | | - spin_lock_irqsave(&msi->mask_lock, flags); |
1603 | | - value = afi_readl(pcie, AFI_MSI_EN_VEC(index)); |
1604 | | - value |= BIT(d->hwirq % 32); |
1605 | | - afi_writel(pcie, value, AFI_MSI_EN_VEC(index)); |
1606 | | - spin_unlock_irqrestore(&msi->mask_lock, flags); |
| 1601 | + scoped_guard(raw_spinlock_irqsave, &msi->mask_lock) { |
| 1602 | + value = afi_readl(pcie, AFI_MSI_EN_VEC(index)); |
| 1603 | + value |= BIT(d->hwirq % 32); |
| 1604 | + afi_writel(pcie, value, AFI_MSI_EN_VEC(index)); |
| 1605 | + } |
1607 | 1606 | } |
1608 | 1607 |
|
1609 | 1608 | static void tegra_compose_msi_msg(struct irq_data *data, struct msi_msg *msg) |
@@ -1711,7 +1710,7 @@ static int tegra_pcie_msi_setup(struct tegra_pcie *pcie) |
1711 | 1710 | int err; |
1712 | 1711 |
|
1713 | 1712 | mutex_init(&msi->map_lock); |
1714 | | - spin_lock_init(&msi->mask_lock); |
| 1713 | + raw_spin_lock_init(&msi->mask_lock); |
1715 | 1714 |
|
1716 | 1715 | if (IS_ENABLED(CONFIG_PCI_MSI)) { |
1717 | 1716 | err = tegra_allocate_domains(msi); |
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