@@ -234,11 +234,7 @@ define <32 x i16> @elts_pmulhu_512(<32 x i16> %a0, <32 x i16> %a1) {
234234
235235define <8 x i16 > @known_pmulhu_128 (<8 x i16 > %a0 , <8 x i16 > %a1 , <8 x i16 > %a2 ) {
236236; CHECK-LABEL: @known_pmulhu_128(
237- ; CHECK-NEXT: [[X0:%.*]] = lshr <8 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
238- ; CHECK-NEXT: [[X1:%.*]] = and <8 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
239- ; CHECK-NEXT: [[M:%.*]] = tail call <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16> [[X0]], <8 x i16> [[X1]])
240- ; CHECK-NEXT: [[R:%.*]] = add <8 x i16> [[M]], [[A2:%.*]]
241- ; CHECK-NEXT: ret <8 x i16> [[R]]
237+ ; CHECK-NEXT: ret <8 x i16> [[A2:%.*]]
242238;
243239 %x0 = lshr <8 x i16 > %a0 , <i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 >
244240 %x1 = and <8 x i16 > %a1 , <i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 >
@@ -249,11 +245,7 @@ define <8 x i16> @known_pmulhu_128(<8 x i16> %a0, <8 x i16> %a1, <8 x i16> %a2)
249245
250246define <16 x i16 > @known_pmulhu_256 (<16 x i16 > %a0 , <16 x i16 > %a1 , <16 x i16 > %a2 ) {
251247; CHECK-LABEL: @known_pmulhu_256(
252- ; CHECK-NEXT: [[X0:%.*]] = lshr <16 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
253- ; CHECK-NEXT: [[X1:%.*]] = and <16 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
254- ; CHECK-NEXT: [[M:%.*]] = tail call <16 x i16> @llvm.x86.avx2.pmulhu.w(<16 x i16> [[X0]], <16 x i16> [[X1]])
255- ; CHECK-NEXT: [[R:%.*]] = add <16 x i16> [[M]], [[A2:%.*]]
256- ; CHECK-NEXT: ret <16 x i16> [[R]]
248+ ; CHECK-NEXT: ret <16 x i16> [[A2:%.*]]
257249;
258250 %x0 = lshr <16 x i16 > %a0 , <i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 , i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 >
259251 %x1 = and <16 x i16 > %a1 , <i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 >
@@ -264,11 +256,7 @@ define <16 x i16> @known_pmulhu_256(<16 x i16> %a0, <16 x i16> %a1, <16 x i16> %
264256
265257define <32 x i16 > @known_pmulhu_512 (<32 x i16 > %a0 , <32 x i16 > %a1 , <32 x i16 > %a2 ) {
266258; CHECK-LABEL: @known_pmulhu_512(
267- ; CHECK-NEXT: [[X0:%.*]] = lshr <32 x i16> [[A0:%.*]], <i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15, i16 8, i16 9, i16 10, i16 11, i16 12, i16 13, i16 14, i16 15>
268- ; CHECK-NEXT: [[X1:%.*]] = and <32 x i16> [[A1:%.*]], <i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3, i16 3>
269- ; CHECK-NEXT: [[M:%.*]] = tail call <32 x i16> @llvm.x86.avx512.pmulhu.w.512(<32 x i16> [[X0]], <32 x i16> [[X1]])
270- ; CHECK-NEXT: [[R:%.*]] = add <32 x i16> [[M]], [[A2:%.*]]
271- ; CHECK-NEXT: ret <32 x i16> [[R]]
259+ ; CHECK-NEXT: ret <32 x i16> [[A2:%.*]]
272260;
273261 %x0 = lshr <32 x i16 > %a0 , <i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 , i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 , i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 , i16 8 , i16 9 , i16 10 , i16 11 , i16 12 , i16 13 , i16 14 , i16 15 >
274262 %x1 = and <32 x i16 > %a1 , <i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 , i16 3 >
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