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1 parent 6a622db commit affad6dCopy full SHA for affad6d
tools/converter.py
@@ -464,7 +464,7 @@ def all_interfaces(module):
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for interface_el in interface_list:
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converter = FSLConverter(
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interface_name=interface_el,
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- interface_spec_file=Path(__file__).parent.parent / "specs/fsl_preprocess_param.yml")
+ interface_spec_file=Path(__file__).parent.parent / f"specs/fsl_{module_name}_param.yml")
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converter.pydra_specs(write=True, dirname=dirname_interf)
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if __name__ == '__main__':
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