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tests: drivers: i2s: Add test to check MCLK generation
Add test that verifies possiblity to output Master CLK (MCLK) by the I2S/TDM peripherals. Signed-off-by: Sebastian Głąb <[email protected]>
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CODEOWNERS

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/tests/drivers/audio/dmic_dump_buffer/ @nrfconnect/ncs-low-level-test
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/tests/drivers/audio/pdm_loopback/ @nrfconnect/ncs-low-level-test
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/tests/drivers/gpio/ @nrfconnect/ncs-low-level-test @nrfconnect/ncs-ll-ursus
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/tests/drivers/i2s/ @nrfconnect/ncs-low-level-test
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/tests/drivers/flash/flash_ipuc/ @nrfconnect/ncs-charon
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/tests/drivers/flash/flash_rpc/ @nrfconnect/ncs-pluto
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/tests/drivers/flash_patch/ @nrfconnect/ncs-pluto
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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cmake_minimum_required(VERSION 3.20.0)
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find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
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project(i2s_mclk)
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FILE(GLOB app_sources src/*.c)
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target_sources(app PRIVATE ${app_sources})

tests/drivers/i2s/i2s_mclk/Kconfig

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#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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mainmenu "I2S MCLK Test"
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source "Kconfig.zephyr"
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config I2S_TEST_USE_GPIO_LOOPBACK
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bool "Use GPIO loopback"
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default y if DT_HAS_NORDIC_NRF_I2S_ENABLED || DT_HAS_NORDIC_NRF_TDM_ENABLED
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help
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Use wiring between the data-out and data-in pins for looping back
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data. This option is intended to be used for devices that do not
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provide the internal loopback functionality.
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config I2S_TEST_ALLOWED_DATA_OFFSET
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int "Allowed offset in received data"
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default 2 if DT_HAS_NORDIC_NRF_I2S_ENABLED || DT_HAS_NORDIC_NRF_TDM_ENABLED
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default 0
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help
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Maximum allowed offset between sent and received samples. Non-zero
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value of this option may be needed when GPIO loopback is used.
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config I2S_TEST_SKIP_I2S_DIR_RX
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bool "Skip testing when I2S direction is I2S_DIR_RX"
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help
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When set to 'y', tests on I2S configured with I2S_DIR_RX
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will be skipped.
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config I2S_TEST_SKIP_I2S_DIR_TX
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bool "Skip testing when I2S direction is I2S_DIR_TX"
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help
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When set to 'y', tests on I2S configured with I2S_DIR_TX
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will be skipped.
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CONFIG_I2S_TEST_SKIP_I2S_DIR_RX=y
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/ {
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aliases {
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i2s-node0 = &i2s0;
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};
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zephyr,user {
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gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>, /* Connect with I2C_MCK */
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<&gpio1 7 GPIO_ACTIVE_HIGH>; /* Connect with I2S_LRCK_M */
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};
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};
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&pinctrl {
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i2s0_default_alt: i2s0_default_alt {
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group1 {
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psels = <NRF_PSEL(I2S_MCK, 1, 4)>,
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<NRF_PSEL(I2S_SCK_M, 1, 5)>,
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<NRF_PSEL(I2S_LRCK_M, 1, 8)>,
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<NRF_PSEL(I2S_SDOUT, 1, 1)>, /* I2S_SDOUT shorted to I2S_SDIN */
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<NRF_PSEL(I2S_SDIN, 1, 2)>;
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};
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};
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};
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&i2s0 {
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status = "okay";
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pinctrl-0 = <&i2s0_default_alt>;
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pinctrl-names = "default";
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};
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CONFIG_NRF_REGTOOL_VERBOSITY=1
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CONFIG_I2S_TEST_SKIP_I2S_DIR_RX=y
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/* i2s-node0 is the transmitter/receiver */
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/ {
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aliases {
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i2s-node0 = &tdm130;
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};
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zephyr,user {
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gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>, /* Connect with TDM_MCK */
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<&gpio2 8 GPIO_ACTIVE_HIGH>; /* Connect with TDM_FSYNC_M */
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};
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&gpiote130 {
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status = "okay";
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};
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&pinctrl {
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tdm130_default_alt: tdm130_default_alt {
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group1 {
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psels = <NRF_PSEL(TDM_MCK, 1, 2)>,
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<NRF_PSEL(TDM_SCK_M, 1, 3)>,
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<NRF_PSEL(TDM_FSYNC_M, 1, 6)>,
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<NRF_PSEL(TDM_SDOUT, 1, 4)>, /* TDM_SDOUT shorted to TDM_SDIN */
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<NRF_PSEL(TDM_SDIN, 1, 5)>;
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};
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};
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};
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&tdm130 {
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status = "okay";
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pinctrl-0 = <&tdm130_default_alt>;
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pinctrl-names = "default";
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memory-regions = <&cpuapp_dma_region>;
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mck-frequency = <32000>;
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};
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/* i2s-node0 is the transmitter/receiver */
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/ {
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aliases {
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i2s-node0 = &i2s20;
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};
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zephyr,user {
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gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>, /* Connect with I2C_MCK */
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<&gpio1 11 GPIO_ACTIVE_HIGH>; /* Connect with I2S_LRCK_M */
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};
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};
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&pinctrl {
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i2s20_default_alt: i2s20_default_alt {
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group1 {
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psels = <NRF_PSEL(I2S_MCK, 1, 8)>,
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<NRF_PSEL(I2S_SCK_M, 1, 2)>,
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<NRF_PSEL(I2S_LRCK_M, 1, 10)>,
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<NRF_PSEL(I2S_SDOUT, 1, 12)>, /* I2S_SDOUT shorted to I2S_SDIN */
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<NRF_PSEL(I2S_SDIN, 1, 13)>;
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};
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};
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};
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/* Disable NFCT on P1.02 and P1.03 */
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&uicr {
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nfct-pins-as-gpios;
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};
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&i2s20 {
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status = "okay";
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pinctrl-0 = <&i2s20_default_alt>;
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pinctrl-names = "default";
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};
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CONFIG_I2S_TEST_SKIP_I2S_DIR_RX=y
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CONFIG_I2S_TEST_SKIP_I2S_DIR_TX=y
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/* i2s-node0 is the transmitter/receiver */
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/ {
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aliases {
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i2s-node0 = &tdm;
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};
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zephyr,user {
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gpios = <&gpio0 3 GPIO_ACTIVE_HIGH>, /* Connect with TDM_MCK */
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<&gpio1 15 GPIO_ACTIVE_HIGH>; /* Connect with TDM_FSYNC_M */
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};
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};
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&pinctrl {
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tdm_default_alt: tdm_default_alt {
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group1 {
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psels = <NRF_PSEL(TDM_MCK, 1, 3)>,
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<NRF_PSEL(TDM_SCK_M, 1, 18)>,
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<NRF_PSEL(TDM_FSYNC_M, 1, 16)>,
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<NRF_PSEL(TDM_SDOUT, 1, 30)>, /* TDM_SDOUT shorted to TDM_SDIN */
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<NRF_PSEL(TDM_SDIN, 1, 31)>;
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};
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};
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};
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&tdm {
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status = "okay";
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pinctrl-0 = <&tdm_default_alt>;
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pinctrl-names = "default";
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mck-frequency = <32000>;
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};

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