Update chipsec so XML names are not case sensitive

Signed-off-by: Nathaniel Mitchell <[email protected]>

Author: npmitche

chipsec/cfg/parsers/core_parser_helper.py

@@ -49,6 +49,7 @@ class ConversionRules:
     int_list_keys: Set[str]
     str_list_keys: Set[str]
     range_list_keys: Set[str]
+    case_insensitive_keys: Set[str]
 
     @classmethod
     def default_rules(cls) -> 'ConversionRules':
@@ -68,7 +69,8 @@ def default_rules(cls) -> 'ConversionRules':
             bool_keys={'req_pch'},
             int_list_keys={'bus'},
             str_list_keys={'config'},
-            range_list_keys=range_list_keys
+            range_list_keys=range_list_keys,
+            case_insensitive_keys={'name'}
         )
 
     def set_did_as_range(self):
@@ -141,6 +143,8 @@ def _convert_attribute(self, key: str, value: str,
                 return self._parse_range_data(value)
             elif key in rules.bool_keys:
                 return value.lower() == 'true'
+            elif key in rules.case_insensitive_keys:
+                return value.upper()
             else:
                 return value
         except ValueError as e:

chipsec/config.py

@@ -948,7 +948,7 @@ def load_platform_config(self):
     ###
     def set_scope(self, scope: Dict[str, str]) -> None:
         """Set the current scope for register access."""
-        self.scope.update(scope)
+        self.scope.update((k.upper() if k is not None else None, v.upper() if v is not None else None) for k, v in scope.items())
 
     def clear_scope(self) -> None:
         """Clear the current scope for register access."""
@@ -975,7 +975,7 @@ def convert_platform_scope(self, scope, name):
             sname = scope + '.' + name
         else:
             sname = name
-        return sname.split('.')
+        return sname.upper().split('.')
 
     def get_objlist(self, name: str):
         scope = self.get_scope(name)

chipsec/hal/intel/mmcfg.py

@@ -90,6 +90,8 @@ def _find_base_instance(self, bus: int) -> Optional['PCIObj']:
         """
         base_instance = None
         for _instance in self.base_list:
+            if _instance is None or _instance.bus is None:
+                continue
             if bus >= _instance.bus:
                 base_instance = _instance
             else:

chipsec/hal/intel/spi.py

@@ -46,6 +46,7 @@
 import time
 from typing import Dict, List, Tuple, Optional
 from chipsec.library.defines import BIT0, BIT1, BIT2, BIT5
+from chipsec.library.register import NullRegister
 from chipsec.library.file import write_file, read_file
 from chipsec.library.logger import print_buffer_bytes
 from chipsec.hal import hal_base
@@ -124,6 +125,8 @@ def __init__(self, cs):
         # which are required to send SPI cycles once for performance reasons
     def get_registers(self) -> None:
         self.hsfs = self.cs.register.get_instance_by_name('8086.SPI.SPIBAR.HSFS', self.instance)
+        if type(self.hsfs) is NullRegister:
+            raise HALInitializationError(f"Missing SPIBAR registers [{self.hsfs.name}]. Be sure to have them defined for the SPI HAL to work.")
         self.hsfc = self.cs.register.get_instance_by_name('8086.SPI.SPIBAR.HSFC', self.instance)
         self.faddr = self.cs.register.get_instance_by_name('8086.SPI.SPIBAR.FADDR', self.instance)
         self.fdata0 = self.cs.register.get_instance_by_name('8086.SPI.SPIBAR.FDATA0', self.instance)

chipsec/library/control.py

@@ -56,6 +56,7 @@ def get_list_by_name(self, control_name: str) -> ObjList:
         Returns:
             List of control objects matching the name
         """
+        control_name = control_name.upper()
         controls = ObjList()
         if control_name in self.cs.Cfg.CONTROLS:
             controls.extend(self.cs.Cfg.CONTROLS[control_name])
@@ -72,6 +73,7 @@ def get_instance_by_name(self, control_name: str, instance: Any) -> Optional[Any
         Returns:
             Control instance if found, None otherwise
         """
+        control_name = control_name.upper()
         if control_name in self.cs.Cfg.CONTROLS:
             for ctrl in self.cs.Cfg.CONTROLS[control_name]:
                 if instance == ctrl.instance:
@@ -91,6 +93,7 @@ def get_def(self, control_name: str) -> List[Any]:
         Raises:
             KeyError: If control_name is not found in configuration
         """
+        control_name = control_name.upper()
         return self.cs.Cfg.CONTROLS[control_name]
 
     def is_defined(self, control_name: str) -> bool:
@@ -103,4 +106,5 @@ def is_defined(self, control_name: str) -> bool:
         Returns:
             True if control is defined, False otherwise
         """
+        control_name = control_name.upper()
         return control_name in self.cs.Cfg.CONTROLS

chipsec/library/register.py

@@ -483,6 +483,7 @@ def set_value(self, value: int) -> None:
         self.value = value
 
     def set_field(self, field_name: str, field_value: int) -> int:
+        field_name = field_name.upper()
         field_attrs = self.fields[field_name]
         bit = field_attrs['bit']
         size = field_attrs['size']
@@ -492,6 +493,7 @@ def set_field(self, field_name: str, field_value: int) -> int:
     def get_field(
         self, field_name: str, preserve_field_position: Optional[bool] = False
     ) -> int:
+        field_name = field_name.upper()
         if self.value is None:
             self.read()
         field_attrs = self.fields[field_name]
@@ -500,6 +502,7 @@ def get_field(
         return get_bits(self.value, field_bit, field_size, preserve_field_position)
 
     def has_field(self, field_name: str) -> bool:
+        field_name = field_name.upper()
         return self.fields.get(field_name, None) is not None
 
     def has_all_fields(self, field_names: List[str]) -> bool:
@@ -645,6 +648,8 @@ def is_any_value(self, value: int, mask: Optional[int] = None) -> bool:
 
     def get_field_value_if_equivalent(self, field: str, preserve_field_position: bool = False) -> Optional[int]:
         """Get field value if all instances have the same value for that field"""
+        if len(self) == 0:
+            return None
         field_value = self[0].get_field(field, preserve_field_position)
         if any(inst.get_field(field, preserve_field_position) != field_value for inst in self[1:]):
             return None
@@ -740,6 +745,10 @@ def has_field(self, field_name: str) -> bool:
     def get_field(self, field_name: str,
                  preserve_field_position: bool = False) -> int:
         """Null implementation of get_field."""
+        field_name = field_name.upper()
         logger().log_warning(f'Attempted to get field {field_name} '
                            f'from null register {self.name}')
         return 0
+
+    def read_field(self, field_name: str, preserve_field_position: bool = False) -> int:
+        return self.get_field(field_name, preserve_field_position)

chipsec/modules/common/cpu/ia_untrusted.py

@@ -77,7 +77,7 @@ def check_untrusted(self) -> int:
                 if ia_untrusted == 0:
                     res = ModuleResult.FAILED
                     self.result.setStatusBit(self.result.status.CONFIGURATION)
-                    self.logger.log_bad(f'IA_UNTRUSTED not set on thread {bd.get_instace()}.')
+                    self.logger.log_bad(f'IA_UNTRUSTED not set on thread {bd.get_instance()}.')
                 else:
                     self.logger.log_good(f'IA_UNTRUSTED set on thread {bd.get_instance()}.')
         return res