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Update configs and files for some external tests
Signed-off-by: Nathaniel Mitchell <nathaniel.p.mitchell@intel.com>
1 parent 6d27c8b commit d3a62be

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7 files changed

+50
-26
lines changed

7 files changed

+50
-26
lines changed

chipsec/cfg/8086/HOSTCTL/hostctl11gen.xml

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -6,9 +6,6 @@
66
<bar name="MCHBAR" register="MCHBAR" base_field="MCHBAR" size="0x8000" enable_bit="0" desc="Host Memory Mapped Register Range"/>
77
<bar name="MMCFG" register="PCIEXBAR" base_field="PXPEPBAR" size="0x1000" enable_bit="0" desc="PCI Express Register Range"/>
88
<bar name="DMIBAR" register="DMIBAR" base_field="DMIBAR" size="0x1000" enable_bit="0" desc="Root Complex Register Range"/>
9-
<!-- VT-d BARs -->
10-
<bar name="VTBAR" register="VTBAR" base_field="Base" size="0x1000" enable_field="Enable" desc="Intel VT-d Register Register Range"/>
11-
<bar name="GFXVTBAR" register="GFXVTBAR" base_field="Base" size="0x1000" enable_field="Enable" desc="Intel Processor Graphics VT-d Register Range"/>
129
</mmio>
1310

1411
<!-- #################################### -->

chipsec/cfg/8086/MMIO/pwrm0.xml

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -11,6 +11,10 @@
1111
<field name="SCIS" bit="0" size="3" desc="SCI IRQ Select"/>
1212
</register>
1313
<register name="PM_CFG" type="mmio" bar="PWRMBASE" offset="0x1818" size="4" desc="Power Management Configuration Reg 1"/>
14+
<register name="ETR3" type="mmio" bar="PWRMBASE" offset="0x1048" size="4" desc="Extended Test Mode Register 3">
15+
<field name="CF9GR" bit="20" size="1" desc="CF9h Global Reset"/>
16+
<field name="CF9LOCK" bit="31" size="1" desc="CF9h Lock"/>
17+
</register>
1418
</registers>
1519

1620
<controls>

chipsec/cfg/8086/tglu.xml

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,9 @@ http://www.intel.com/content/www/us/en/processors/core/core-technical-resources.
4949
<!-- -->
5050
<!-- #################################### -->
5151
<pci>
52-
<device name="HOSTCTL" bus="0x0" dev="0x00" fun="0" did="0x9A14" config="HOSTCTL.hostctl11gen.xml"/>
52+
<device name="HOSTCTL" bus="0x0" dev="0x00" fun="0" did="0x9A14" config="HOSTCTL.hostctl11gen.xml">
53+
<subcomponent type="mmiobar" name="MCHBAR" register="MCHBAR" base_field="MCHBAR" size="0x8000" enable_bit="0" config="MMIO.mmio0.xml" />
54+
</device>
5355
<!-- <device name="HOSTCTL" bus="0x0" dev="0x00" fun="0" config="IOMMU.iommu.xml"/> -->
5456
<device name="IGD" bus="0x0" dev="0x02" fun="0" config="IGD.igd0.xml"/>
5557
<device name="MEI1" bus="0x0" dev="0x16" fun="0" config="ME.mei0.xml" />

chipsec/cfg/parsers/core_parser_helper.py

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -390,8 +390,9 @@ def process_bar(self,
390390
device_dest = dest[vid_str][bar_attr['device']]
391391

392392
# Handle existing configuration
393-
if bar_name in device_dest and 'config' in bar_attr:
394-
device_dest[bar_name].add_config(bar_attr['config'])
393+
if bar_name in device_dest:
394+
if'config' in bar_attr:
395+
device_dest[bar_name].add_config(bar_attr['config'])
395396
else:
396397
# Create new bar object
397398
pci_config = self.cfg.CONFIG_PCI

chipsec/library/register.py

Lines changed: 33 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -216,28 +216,44 @@ def get_list_by_name_without_scope(self, reg_name: str) -> 'ObjList':
216216
if hasattr(self.cs.Cfg, 'platform') and self.cs.Cfg.platform:
217217
# Log diagnostic info at debug level
218218
platform = self.cs.Cfg.platform
219-
if hasattr(platform, 'vendors') and platform.vendors:
220-
vendor_count = len(platform.vendors)
219+
if hasattr(platform, 'vendor_list') and platform.vendor_list:
220+
vendor_count = len(platform.vendor_list)
221221
logger().log_debug(f"Searching {vendor_count} vendors in platform structure")
222222

223223
# Search through all vendor/device combinations
224-
for vendor_id in platform.vendors:
225-
vendor = platform.vendors[vendor_id]
224+
for vendor_id in platform.vendor_list:
225+
vendor = platform.get_vendor(vendor_id)
226226

227227
# Check if vendor.devices exists
228-
if hasattr(vendor, 'devices') and vendor.devices:
229-
for device_id in vendor.devices:
230-
device = vendor.devices[device_id]
231-
228+
if hasattr(vendor, 'ip_list') and vendor.ip_list:
229+
for ip_id in vendor.ip_list:
230+
ip = vendor.get_ip(ip_id)
231+
232+
if hasattr(ip, 'bar_list') and ip.bar_list:
233+
for bar_id in ip.bar_list:
234+
# Check for registers
235+
bar = ip.get_bar(bar_id)
236+
has_registers = (hasattr(bar, 'register_list') and
237+
bar.register_list)
238+
239+
if has_registers and reg_name in bar.register_list:
240+
# Found the register, add all instances
241+
reg_objects = bar.register_list[reg_name]
242+
logger().log_debug(
243+
f"Found register {reg_name} in {vendor_id}.{ip_id}.{bar_id}")
244+
if isinstance(reg_objects, list):
245+
result_list.extend(reg_objects)
246+
else:
247+
result_list.append(reg_objects)
232248
# Check for registers
233-
has_registers = (hasattr(device, 'registers') and
234-
device.registers is not None)
249+
has_registers = (hasattr(ip, 'register_list') and
250+
ip.register_list)
235251

236-
if has_registers and reg_name in device.registers:
252+
if has_registers and reg_name in ip.register_list:
237253
# Found the register, add all instances
238-
reg_objects = device.registers[reg_name]
254+
reg_objects = ip.register_list[reg_name]
239255
logger().log_debug(
240-
f"Found register {reg_name} in {vendor_id}.{device_id}")
256+
f"Found register {reg_name} in {vendor_id}.{ip_id}")
241257

242258
if isinstance(reg_objects, list):
243259
result_list.extend(reg_objects)
@@ -337,12 +353,10 @@ def has_field(self, reg_name: str, field_name: str) -> bool:
337353
reg_defs = self.cs.Cfg.get_reglist(reg_name)
338354
except RegisterNotFoundError:
339355
return False
340-
for reg_def in reg_defs:
341-
try:
342-
return field_name in reg_def.fields
343-
except KeyError:
344-
return False
345-
return False
356+
try:
357+
return bool(reg_defs) and all([field_name in reg_def.fields for reg_def in reg_defs])
358+
except KeyError:
359+
return False
346360

347361
def get_match(self, name: str) -> List[str]:
348362
"""

tests/modules/tgl/common-remap_test.json

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -31,6 +31,12 @@
3131
],
3232
"(4275851416,8)": [
3333
"0"
34+
],
35+
"(4275886224,8)": [
36+
"549754765312"
37+
],
38+
"(4275886232,8)": [
39+
"0"
3440
]
3541
},
3642
"read_msr": {

tests/modules/tgl/enumeration.json

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -132,7 +132,7 @@
132132
},
133133
"read_pci_reg": {
134134
"(0,0,0,0,4)": [
135-
"1493467270"
135+
"2585034886"
136136
],
137137
"(0,0,0,8,1)": [
138138
"1"

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