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Commit 21ed1f1

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author
James Munns
committed
Fix 9160 module imports
1 parent ed18017 commit 21ed1f1

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-14
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+18
-14
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nrf-hal-common/src/timer.rs

Lines changed: 18 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -3,10 +3,16 @@
33
//! See product specification, chapter 24.
44
55
#[cfg(feature = "9160")]
6-
use crate::pac::{Interrupt, TIMER0_NS as TIMER0, TIMER1_NS as TIMER1, TIMER2_NS as TIMER2};
6+
use crate::pac::{
7+
timer0_ns::RegisterBlock as RegBlock0, Interrupt, TIMER0_NS as TIMER0, TIMER1_NS as TIMER1,
8+
TIMER2_NS as TIMER2,
9+
};
710

811
#[cfg(not(feature = "9160"))]
9-
use crate::pac::{Interrupt, TIMER0, TIMER1, TIMER2};
12+
use crate::pac::{
13+
timer0::RegisterBlock as RegBlock0, timer3::RegisterBlock as RegBlock3, Interrupt, TIMER0,
14+
TIMER1, TIMER2,
15+
};
1016

1117
use cast::u32;
1218
use embedded_hal::{
@@ -20,8 +26,6 @@ use void::{unreachable, Void};
2026
#[cfg(any(feature = "52832", feature = "52833", feature = "52840"))]
2127
use crate::pac::{TIMER3, TIMER4};
2228

23-
use crate::pac;
24-
2529
use core::marker::PhantomData;
2630

2731
pub struct OneShot;
@@ -238,7 +242,7 @@ pub trait Instance: sealed::Sealed {
238242
/// This interrupt associated with this RTC instance.
239243
const INTERRUPT: Interrupt;
240244

241-
fn as_timer0(&self) -> &pac::timer0::RegisterBlock;
245+
fn as_timer0(&self) -> &RegBlock0;
242246

243247
fn timer_start<Time>(&self, cycles: Time)
244248
where
@@ -335,7 +339,7 @@ impl Instance for TIMER0 {
335339
const INTERRUPT: Interrupt = Interrupt::TIMER0;
336340

337341
#[inline(always)]
338-
fn as_timer0(&self) -> &pac::timer0::RegisterBlock {
342+
fn as_timer0(&self) -> &RegBlock0 {
339343
self
340344
}
341345
}
@@ -344,7 +348,7 @@ impl Instance for TIMER1 {
344348
const INTERRUPT: Interrupt = Interrupt::TIMER1;
345349

346350
#[inline(always)]
347-
fn as_timer0(&self) -> &pac::timer0::RegisterBlock {
351+
fn as_timer0(&self) -> &RegBlock0 {
348352
self
349353
}
350354
}
@@ -353,7 +357,7 @@ impl Instance for TIMER2 {
353357
const INTERRUPT: Interrupt = Interrupt::TIMER2;
354358

355359
#[inline(always)]
356-
fn as_timer0(&self) -> &pac::timer0::RegisterBlock {
360+
fn as_timer0(&self) -> &RegBlock0 {
357361
self
358362
}
359363
}
@@ -363,9 +367,9 @@ impl Instance for TIMER3 {
363367
const INTERRUPT: Interrupt = Interrupt::TIMER3;
364368

365369
#[inline(always)]
366-
fn as_timer0(&self) -> &pac::timer0::RegisterBlock {
367-
let rb: &pac::timer3::RegisterBlock = self;
368-
let rb_ptr: *const pac::timer3::RegisterBlock = rb;
370+
fn as_timer0(&self) -> &RegBlock0 {
371+
let rb: &RegBlock3 = self;
372+
let rb_ptr: *const RegBlock3 = rb;
369373

370374
// SAFETY: TIMER0 and TIMER3 register layouts are identical, except
371375
// that TIMER3 has 6 CC registers, while TIMER0 has 4. There is
@@ -379,9 +383,9 @@ impl Instance for TIMER4 {
379383
const INTERRUPT: Interrupt = Interrupt::TIMER4;
380384

381385
#[inline(always)]
382-
fn as_timer0(&self) -> &pac::timer0::RegisterBlock {
383-
let rb: &pac::timer3::RegisterBlock = self;
384-
let rb_ptr: *const pac::timer3::RegisterBlock = rb;
386+
fn as_timer0(&self) -> &RegBlock0 {
387+
let rb: &RegBlock3 = self;
388+
let rb_ptr: *const RegBlock3 = rb;
385389

386390
// SAFETY: TIMER0 and TIMER3 register layouts are identical, except
387391
// that TIMER3 has 6 CC registers, while TIMER0 has 4. There is

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