@@ -443,7 +443,7 @@ impl<'c> Radio<'c> {
443443 // configure radio to immediately start transmission if the channel is idle
444444 self . radio
445445 . shorts
446- . modify ( |_, w| w. ccaidle_txen ( ) . set_bit ( ) . txready_start ( ) . set_bit ( ) ) ;
446+ . modify ( |_, w| w. ccaidle_txen ( ) . set_bit ( ) . txready_start ( ) . set_bit ( ) . end_disable ( ) . set_bit ( ) ) ;
447447
448448 // the DMA transfer will start at some point after the following write operation so
449449 // we place the compiler fence here
@@ -498,7 +498,7 @@ impl<'c> Radio<'c> {
498498 // immediately start transmission if the channel is idle
499499 self . radio
500500 . shorts
501- . modify ( |_, w| w. ccaidle_txen ( ) . set_bit ( ) . txready_start ( ) . set_bit ( ) ) ;
501+ . modify ( |_, w| w. ccaidle_txen ( ) . set_bit ( ) . txready_start ( ) . set_bit ( ) . end_disable ( ) . set_bit ( ) ) ;
502502
503503 // the DMA transfer will start at some point after the following write operation so
504504 // we place the compiler fence here
@@ -563,11 +563,17 @@ impl<'c> Radio<'c> {
563563 . write ( |w| w. packetptr ( ) . bits ( packet. buffer . as_ptr ( ) as u32 ) ) ;
564564 }
565565
566+ // configure radio to disable transmitter once packet is sent
567+ self . radio
568+ . shorts
569+ . modify ( |_, w| w. end_disable ( ) . set_bit ( ) ) ;
570+
566571 // start DMA transfer
567572 dma_start_fence ( ) ;
568573 self . radio . tasks_start . write ( |w| w. tasks_start ( ) . set_bit ( ) ) ;
569574
570575 self . wait_for_event ( Event :: PhyEnd ) ;
576+ self . radio . shorts . reset ( ) ;
571577 }
572578
573579 /// Moves the radio from any state to the DISABLED state
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