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jonas-schievinkjonas-schievink
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Merge pull request #285 from timokroeger/gpio-psel-refactor
Refactor Pin Selection and Reconstructions
2 parents cf256a2 + a6dc345 commit 6fc5061

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9 files changed

+50
-151
lines changed

9 files changed

+50
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lines changed

‎nrf-hal-common/src/gpio.rs

Lines changed: 16 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -43,24 +43,6 @@ pub enum Port {
4343
Port1,
4444
}
4545

46-
#[cfg(any(feature = "52833", feature = "52840"))]
47-
impl Port {
48-
pub(crate) fn bit(&self) -> bool {
49-
match self {
50-
Port::Port0 => false,
51-
Port::Port1 => true,
52-
}
53-
}
54-
55-
pub(crate) fn from_bit(bit: bool) -> Port {
56-
if bit {
57-
Port::Port1
58-
} else {
59-
Port::Port0
60-
}
61-
}
62-
}
63-
6446
// ===============================================================
6547
// Implement Generic Pins for this port, which allows you to use
6648
// other peripherals without having to be completely rust-generic
@@ -89,23 +71,30 @@ use crate::hal::digital::v2::{InputPin, OutputPin, StatefulOutputPin};
8971
use void::Void;
9072

9173
impl<MODE> Pin<MODE> {
92-
pub(crate) fn new(port: Port, pin: u8) -> Self {
74+
fn new(port: Port, pin: u8) -> Self {
9375
let port_bits = match port {
9476
Port::Port0 => 0x00,
9577
#[cfg(any(feature = "52833", feature = "52840"))]
96-
Port::Port1 => 0x80,
78+
Port::Port1 => 0x20,
9779
};
9880
Self {
9981
pin_port: pin | port_bits,
10082
_mode: PhantomData,
10183
}
10284
}
10385

86+
pub unsafe fn from_psel_bits(psel_bits: u32) -> Self {
87+
Self {
88+
pin_port: psel_bits as u8,
89+
_mode: PhantomData,
90+
}
91+
}
92+
10493
#[inline]
10594
pub fn pin(&self) -> u8 {
10695
#[cfg(any(feature = "52833", feature = "52840"))]
10796
{
108-
self.pin_port & 0x7f
97+
self.pin_port & 0x1f
10998
}
11099

111100
#[cfg(not(any(feature = "52833", feature = "52840")))]
@@ -118,7 +107,7 @@ impl<MODE> Pin<MODE> {
118107
pub fn port(&self) -> Port {
119108
#[cfg(any(feature = "52833", feature = "52840"))]
120109
{
121-
if self.pin_port & 0x80 == 0 {
110+
if self.pin_port & 0x20 == 0 {
122111
Port::Port0
123112
} else {
124113
Port::Port1
@@ -131,6 +120,11 @@ impl<MODE> Pin<MODE> {
131120
}
132121
}
133122

123+
#[inline]
124+
pub fn psel_bits(&self) -> u32 {
125+
self.pin_port as u32
126+
}
127+
134128
fn block(&self) -> &gpio::RegisterBlock {
135129
let ptr = match self.port() {
136130
Port::Port0 => P0::ptr(),

‎nrf-hal-common/src/i2s.rs

Lines changed: 10 additions & 30 deletions
Original file line numberDiff line numberDiff line change
@@ -43,41 +43,31 @@ impl I2S {
4343

4444
if let Some(p) = mck_pin {
4545
i2s.psel.mck.write(|w| {
46-
unsafe { w.pin().bits(p.pin()) };
47-
#[cfg(any(feature = "52833", feature = "52840"))]
48-
w.port().bit(p.port().bit());
46+
unsafe { w.bits(p.psel_bits()) };
4947
w.connect().connected()
5048
});
5149
}
5250

5351
i2s.psel.sck.write(|w| {
54-
unsafe { w.pin().bits(sck_pin.pin()) };
55-
#[cfg(any(feature = "52833", feature = "52840"))]
56-
w.port().bit(sck_pin.port().bit());
52+
unsafe { w.bits(sck_pin.psel_bits()) };
5753
w.connect().connected()
5854
});
5955

6056
i2s.psel.lrck.write(|w| {
61-
unsafe { w.pin().bits(lrck_pin.pin()) };
62-
#[cfg(any(feature = "52833", feature = "52840"))]
63-
w.port().bit(lrck_pin.port().bit());
57+
unsafe { w.bits(lrck_pin.psel_bits()) };
6458
w.connect().connected()
6559
});
6660

6761
if let Some(p) = sdin_pin {
6862
i2s.psel.sdin.write(|w| {
69-
unsafe { w.pin().bits(p.pin()) };
70-
#[cfg(any(feature = "52833", feature = "52840"))]
71-
w.port().bit(p.port().bit());
63+
unsafe { w.bits(p.psel_bits()) };
7264
w.connect().connected()
7365
});
7466
}
7567

7668
if let Some(p) = sdout_pin {
7769
i2s.psel.sdout.write(|w| {
78-
unsafe { w.pin().bits(p.pin()) };
79-
#[cfg(any(feature = "52833", feature = "52840"))]
80-
w.port().bit(p.port().bit());
70+
unsafe { w.bits(p.psel_bits()) };
8171
w.connect().connected()
8272
});
8373
}
@@ -105,41 +95,31 @@ impl I2S {
10595

10696
if let Some(p) = mck_pin {
10797
i2s.psel.mck.write(|w| {
108-
unsafe { w.pin().bits(p.pin()) };
109-
#[cfg(any(feature = "52833", feature = "52840"))]
110-
w.port().bit(p.port().bit());
98+
unsafe { w.bits(p.psel_bits()) };
11199
w.connect().connected()
112100
});
113101
}
114102

115103
i2s.psel.sck.write(|w| {
116-
unsafe { w.pin().bits(sck_pin.pin()) };
117-
#[cfg(any(feature = "52833", feature = "52840"))]
118-
w.port().bit(sck_pin.port().bit());
104+
unsafe { w.bits(sck_pin.psel_bits()) };
119105
w.connect().connected()
120106
});
121107

122108
i2s.psel.lrck.write(|w| {
123-
unsafe { w.pin().bits(lrck_pin.pin()) };
124-
#[cfg(any(feature = "52833", feature = "52840"))]
125-
w.port().bit(lrck_pin.port().bit());
109+
unsafe { w.bits(lrck_pin.psel_bits()) };
126110
w.connect().connected()
127111
});
128112

129113
if let Some(p) = sdin_pin {
130114
i2s.psel.sdin.write(|w| {
131-
unsafe { w.pin().bits(p.pin()) };
132-
#[cfg(any(feature = "52833", feature = "52840"))]
133-
w.port().bit(p.port().bit());
115+
unsafe { w.bits(p.psel_bits()) };
134116
w.connect().connected()
135117
});
136118
}
137119

138120
if let Some(p) = sdout_pin {
139121
i2s.psel.sdout.write(|w| {
140-
unsafe { w.pin().bits(p.pin()) };
141-
#[cfg(any(feature = "52833", feature = "52840"))]
142-
w.port().bit(p.port().bit());
122+
unsafe { w.bits(p.psel_bits()) };
143123
w.connect().connected()
144124
});
145125
}

‎nrf-hal-common/src/pwm.rs

Lines changed: 1 addition & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,6 @@
44
55
#[cfg(not(any(feature = "52810", feature = "52811")))]
66
use crate::{
7-
gpio::Port,
87
pac::PWM3,
98
pac::{PWM1, PWM2},
109
};
@@ -133,14 +132,7 @@ where
133132
#[inline(always)]
134133
pub fn set_output_pin(&self, channel: Channel, pin: &Pin<Output<PushPull>>) -> &Self {
135134
self.pwm.psel.out[usize::from(channel)].write(|w| {
136-
#[cfg(any(feature = "52833", feature = "52840"))]
137-
match pin.port() {
138-
Port::Port0 => w.port().clear_bit(),
139-
Port::Port1 => w.port().set_bit(),
140-
};
141-
unsafe {
142-
w.pin().bits(pin.pin());
143-
}
135+
unsafe { w.bits(pin.psel_bits()) };
144136
w.connect().connected()
145137
});
146138
self

‎nrf-hal-common/src/qdec.rs

Lines changed: 3 additions & 20 deletions
Original file line numberDiff line numberDiff line change
@@ -3,8 +3,6 @@
33
//! The Quadrature decoder (QDEC) provides buffered decoding of quadrature-encoded sensor signals.
44
//! It is suitable for mechanical and optical sensors.
55
6-
#[cfg(any(feature = "52833", feature = "52840"))]
7-
use crate::gpio::Port;
86
use {
97
crate::gpio::{Input, Pin, PullUp},
108
crate::pac::QDEC,
@@ -28,32 +26,17 @@ impl Qdec {
2826
sample_period: SamplePeriod,
2927
) -> Self {
3028
qdec.psel.a.write(|w| {
31-
#[cfg(any(feature = "52833", feature = "52840"))]
32-
match pin_a.port() {
33-
Port::Port0 => w.port().clear_bit(),
34-
Port::Port1 => w.port().set_bit(),
35-
};
36-
unsafe { w.pin().bits(pin_a.pin()) };
29+
unsafe { w.bits(pin_a.psel_bits()) };
3730
w.connect().connected()
3831
});
3932
qdec.psel.b.write(|w| {
40-
#[cfg(any(feature = "52833", feature = "52840"))]
41-
match pin_b.port() {
42-
Port::Port0 => w.port().clear_bit(),
43-
Port::Port1 => w.port().set_bit(),
44-
};
45-
unsafe { w.pin().bits(pin_b.pin()) };
33+
unsafe { w.bits(pin_b.psel_bits()) };
4634
w.connect().connected()
4735
});
4836

4937
if let Some(p) = &pin_led {
5038
qdec.psel.led.write(|w| {
51-
#[cfg(any(feature = "52833", feature = "52840"))]
52-
match p.port() {
53-
Port::Port0 => w.port().clear_bit(),
54-
Port::Port1 => w.port().set_bit(),
55-
};
56-
unsafe { w.pin().bits(p.pin()) };
39+
unsafe { w.bits(p.psel_bits()) };
5740
w.connect().connected()
5841
});
5942
}

‎nrf-hal-common/src/spim.rs

Lines changed: 3 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -100,26 +100,20 @@ where
100100
pub fn new(spim: T, pins: Pins, frequency: Frequency, mode: Mode, orc: u8) -> Self {
101101
// Select pins.
102102
spim.psel.sck.write(|w| {
103-
let w = unsafe { w.pin().bits(pins.sck.pin()) };
104-
#[cfg(any(feature = "52843", feature = "52840"))]
105-
let w = w.port().bit(pins.sck.port().bit());
103+
unsafe { w.bits(pins.sck.psel_bits()) };
106104
w.connect().connected()
107105
});
108106

109107
match pins.mosi {
110108
Some(mosi) => spim.psel.mosi.write(|w| {
111-
let w = unsafe { w.pin().bits(mosi.pin()) };
112-
#[cfg(any(feature = "52843", feature = "52840"))]
113-
let w = w.port().bit(mosi.port().bit());
109+
unsafe { w.bits(mosi.psel_bits()) };
114110
w.connect().connected()
115111
}),
116112
None => spim.psel.mosi.write(|w| w.connect().disconnected()),
117113
}
118114
match pins.miso {
119115
Some(miso) => spim.psel.miso.write(|w| {
120-
let w = unsafe { w.pin().bits(miso.pin()) };
121-
#[cfg(any(feature = "52843", feature = "52840"))]
122-
let w = w.port().bit(miso.port().bit());
116+
unsafe { w.bits(miso.psel_bits()) };
123117
w.connect().connected()
124118
}),
125119
None => spim.psel.miso.write(|w| w.connect().disconnected()),

‎nrf-hal-common/src/spis.rs

Lines changed: 4 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -48,32 +48,24 @@ where
4848
/// returning a safe wrapper.
4949
pub fn new(spis: T, pins: Pins) -> Self {
5050
spis.psel.sck.write(|w| {
51-
unsafe { w.pin().bits(pins.sck.pin()) };
52-
#[cfg(any(feature = "52833", feature = "52840"))]
53-
w.port().bit(pins.sck.port().bit());
51+
unsafe { w.bits(pins.sck.psel_bits()) };
5452
w.connect().connected()
5553
});
5654
spis.psel.csn.write(|w| {
57-
unsafe { w.pin().bits(pins.cs.pin()) };
58-
#[cfg(any(feature = "52833", feature = "52840"))]
59-
w.port().bit(pins.cs.port().bit());
55+
unsafe { w.bits(pins.cs.psel_bits()) };
6056
w.connect().connected()
6157
});
6258

6359
if let Some(p) = &pins.copi {
6460
spis.psel.mosi.write(|w| {
65-
unsafe { w.pin().bits(p.pin()) };
66-
#[cfg(any(feature = "52833", feature = "52840"))]
67-
w.port().bit(p.port().bit());
61+
unsafe { w.bits(p.psel_bits()) };
6862
w.connect().connected()
6963
});
7064
}
7165

7266
if let Some(p) = &pins.cipo {
7367
spis.psel.miso.write(|w| {
74-
unsafe { w.pin().bits(p.pin()) };
75-
#[cfg(any(feature = "52833", feature = "52840"))]
76-
w.port().bit(p.port().bit());
68+
unsafe { w.bits(p.psel_bits()) };
7769
w.connect().connected()
7870
});
7971
}

‎nrf-hal-common/src/twim.rs

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -67,15 +67,11 @@ where
6767

6868
// Select pins.
6969
twim.psel.scl.write(|w| {
70-
let w = unsafe { w.pin().bits(pins.scl.pin()) };
71-
#[cfg(any(feature = "52833", feature = "52840"))]
72-
let w = w.port().bit(pins.scl.port().bit());
70+
unsafe { w.bits(pins.scl.psel_bits()) };
7371
w.connect().connected()
7472
});
7573
twim.psel.sda.write(|w| {
76-
let w = unsafe { w.pin().bits(pins.sda.pin()) };
77-
#[cfg(any(feature = "52833", feature = "52840"))]
78-
let w = w.port().bit(pins.sda.port().bit());
74+
unsafe { w.bits(pins.sda.psel_bits()) };
7975
w.connect().connected()
8076
});
8177

‎nrf-hal-common/src/twis.rs

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -60,15 +60,11 @@ where
6060
}
6161

6262
twis.psel.scl.write(|w| {
63-
let w = unsafe { w.pin().bits(pins.scl.pin()) };
64-
#[cfg(any(feature = "52833", feature = "52840"))]
65-
let w = w.port().bit(pins.scl.port().bit());
63+
unsafe { w.bits(pins.scl.psel_bits()) };
6664
w.connect().connected()
6765
});
6866
twis.psel.sda.write(|w| {
69-
let w = unsafe { w.pin().bits(pins.sda.pin()) };
70-
#[cfg(any(feature = "52833", feature = "52840"))]
71-
let w = w.port().bit(pins.sda.port().bit());
67+
unsafe { w.bits(pins.sda.psel_bits()) };
7268
w.connect().connected()
7369
});
7470

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