Skip to content

Commit 8341d92

Browse files
kalkylkalkyl
committed
Merge upstream
2 parents 318500b + 5e98514 commit 8341d92

File tree

13 files changed

+1174
-0
lines changed

13 files changed

+1174
-0
lines changed

‎Cargo.toml

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -13,9 +13,12 @@ members = [
1313
"examples/ppi-demo",
1414
"examples/gpiote-demo",
1515
"examples/wdt-demo",
16+
"examples/lpcomp-demo",
1617
"examples/qdec-demo",
1718
"examples/comp-demo",
1819
"examples/pwm-demo",
20+
"examples/twim-demo",
21+
"examples/twis-demo",
1922
]
2023

2124
[profile.dev]

‎examples/lpcomp-demo/Cargo.toml

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
[package]
2+
name = "lpcomp-demo"
3+
version = "0.1.0"
4+
authors = ["Henrik Alsér"]
5+
edition = "2018"
6+
7+
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
8+
9+
[dependencies]
10+
cortex-m = "0.6.2"
11+
cortex-m-rtic = "0.5.3"
12+
rtt-target = {version = "0.2.0", features = ["cortex-m"] }
13+
nrf52840-hal = { features = ["rt"], path = "../../nrf52840-hal" }
14+
15+
[dependencies.embedded-hal]
16+
version = "0.2.3"
17+
features = ["unproven"]

‎examples/lpcomp-demo/Embed.toml

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
[default.probe]
2+
# The index of the probe in the connected probe list.
3+
# probe_index = 0
4+
# The protocol to be used for communicating with the target.
5+
protocol = "Swd"
6+
# The speed in kHz of the data link to the target.
7+
# speed = 1337
8+
9+
[default.flashing]
10+
# Whether or not the target should be flashed.
11+
enabled = true
12+
# Whether or not the target should be halted after flashing.
13+
halt_afterwards = false
14+
# Whether or not bytes erased but not rewritten with data from the ELF
15+
# should be restored with their contents before erasing.
16+
restore_unwritten_bytes = false
17+
# The path where an SVG of the assembled flash layout should be written to.
18+
# flash_layout_output_path = "out.svg"
19+
20+
[default.general]
21+
# The chip name of the chip to be debugged.
22+
chip = "nRF52840"
23+
# A list of chip descriptions to be loaded during runtime.
24+
chip_descriptions = []
25+
# The default log level to be used.
26+
log_level = "Warn"
27+
28+
[default.rtt]
29+
# Whether or not an RTTUI should be opened after flashing.
30+
# This is exclusive and cannot be used with GDB at the moment.
31+
enabled = true
32+
# A list of channel associations to be displayed. If left empty, all channels are displayed.
33+
channels = [
34+
# { up = 0, down = 0, name = "name" }
35+
]
36+
# The duration in ms for which the logger should retry to attach to RTT.
37+
timeout = 3000
38+
# Whether timestamps in the RTTUI are enabled
39+
show_timestamps = true
40+
41+
[default.gdb]
42+
# Whether or not a GDB server should be opened after flashing.
43+
# This is exclusive and cannot be used with RTT at the moment.
44+
enabled = false
45+
# The connection string in host:port format wher the GDB server will open a socket.
46+
# gdb_connection_string

‎examples/lpcomp-demo/src/main.rs

Lines changed: 119 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,119 @@
1+
#![no_std]
2+
#![no_main]
3+
4+
use embedded_hal::digital::v2::OutputPin;
5+
use {
6+
core::{
7+
panic::PanicInfo,
8+
sync::atomic::{compiler_fence, Ordering},
9+
},
10+
hal::{
11+
gpio::{Level, Output, Pin, PushPull},
12+
gpiote::Gpiote,
13+
lpcomp::*,
14+
pac::POWER,
15+
},
16+
nrf52840_hal as hal,
17+
rtt_target::{rprintln, rtt_init_print},
18+
};
19+
20+
#[rtic::app(device = crate::hal::pac, peripherals = true)]
21+
const APP: () = {
22+
struct Resources {
23+
gpiote: Gpiote,
24+
led1: Pin<Output<PushPull>>,
25+
lpcomp: LpComp,
26+
power: POWER,
27+
}
28+
29+
#[init]
30+
fn init(ctx: init::Context) -> init::LateResources {
31+
let _clocks = hal::clocks::Clocks::new(ctx.device.CLOCK).enable_ext_hfosc();
32+
rtt_init_print!();
33+
34+
let p0 = hal::gpio::p0::Parts::new(ctx.device.P0);
35+
let btn1 = p0.p0_11.into_pullup_input().degrade();
36+
let mut led1 = p0.p0_13.into_push_pull_output(Level::High).degrade();
37+
let in_pin = p0.p0_04.into_floating_input();
38+
let ref_pin = p0.p0_03.into_floating_input();
39+
40+
let lpcomp = LpComp::new(ctx.device.LPCOMP, &in_pin);
41+
lpcomp
42+
.vref(VRef::ARef) // Set Vref to external analog reference
43+
.aref_pin(&ref_pin) // External analog reference pin
44+
.hysteresis(true)
45+
.analog_detect(Transition::Up) // Power up the device on upward transition
46+
.enable_interrupt(Transition::Cross) // Trigger `COMP_LPCOMP` interrupt on any transition
47+
.enable();
48+
49+
// Read initial comparator state and set led on/off
50+
match lpcomp.read() {
51+
CompResult::Above => led1.set_low().ok(),
52+
CompResult::Below => led1.set_high().ok(),
53+
};
54+
55+
let gpiote = Gpiote::new(ctx.device.GPIOTE);
56+
gpiote
57+
.channel0()
58+
.input_pin(&btn1)
59+
.hi_to_lo()
60+
.enable_interrupt();
61+
62+
rprintln!("Power ON");
63+
64+
// Check if the device was powered up by the comparator
65+
if ctx.device.POWER.resetreas.read().lpcomp().is_detected() {
66+
// Clear the lpcomp reset reason bit
67+
ctx.device
68+
.POWER
69+
.resetreas
70+
.modify(|_r, w| w.lpcomp().set_bit());
71+
rprintln!("Powered up by the comparator!");
72+
}
73+
74+
rprintln!("Press button 1 to shut down");
75+
76+
init::LateResources {
77+
gpiote,
78+
led1,
79+
lpcomp,
80+
power: ctx.device.POWER,
81+
}
82+
}
83+
84+
#[idle]
85+
fn idle(_: idle::Context) -> ! {
86+
loop {
87+
cortex_m::asm::wfi();
88+
}
89+
}
90+
91+
#[task(binds = GPIOTE, resources = [gpiote, power])]
92+
fn on_gpiote(ctx: on_gpiote::Context) {
93+
ctx.resources.gpiote.reset_events();
94+
rprintln!("Power OFF");
95+
ctx.resources
96+
.power
97+
.systemoff
98+
.write(|w| w.systemoff().enter());
99+
}
100+
101+
#[task(binds = COMP_LPCOMP, resources = [lpcomp, led1])]
102+
fn on_comp(ctx: on_comp::Context) {
103+
ctx.resources.lpcomp.reset_events();
104+
match ctx.resources.lpcomp.read() {
105+
CompResult::Above => ctx.resources.led1.set_low().ok(),
106+
CompResult::Below => ctx.resources.led1.set_high().ok(),
107+
};
108+
}
109+
};
110+
111+
#[inline(never)]
112+
#[panic_handler]
113+
fn panic(info: &PanicInfo) -> ! {
114+
cortex_m::interrupt::disable();
115+
rprintln!("{}", info);
116+
loop {
117+
compiler_fence(Ordering::SeqCst);
118+
}
119+
}

‎examples/twim-demo/Cargo.toml

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
[package]
2+
name = "twim-demo"
3+
version = "0.1.0"
4+
authors = ["Henrik Alsér"]
5+
edition = "2018"
6+
7+
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
8+
9+
[dependencies]
10+
cortex-m = "0.6.2"
11+
cortex-m-rtic = "0.5.3"
12+
rtt-target = {version = "0.2.0", features = ["cortex-m"] }
13+
nrf52840-hal = { features = ["rt"], path = "../../nrf52840-hal" }
14+
15+
[dependencies.embedded-hal]
16+
version = "0.2.3"
17+
features = ["unproven"]

‎examples/twim-demo/Embed.toml

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
[default.probe]
2+
# The index of the probe in the connected probe list.
3+
# probe_index = 0
4+
# The protocol to be used for communicating with the target.
5+
protocol = "Swd"
6+
# The speed in kHz of the data link to the target.
7+
# speed = 1337
8+
9+
[default.flashing]
10+
# Whether or not the target should be flashed.
11+
enabled = true
12+
# Whether or not the target should be halted after flashing.
13+
halt_afterwards = false
14+
# Whether or not bytes erased but not rewritten with data from the ELF
15+
# should be restored with their contents before erasing.
16+
restore_unwritten_bytes = false
17+
# The path where an SVG of the assembled flash layout should be written to.
18+
# flash_layout_output_path = "out.svg"
19+
20+
[default.general]
21+
# The chip name of the chip to be debugged.
22+
chip = "nRF52840"
23+
# A list of chip descriptions to be loaded during runtime.
24+
chip_descriptions = []
25+
# The default log level to be used.
26+
log_level = "Warn"
27+
28+
[default.rtt]
29+
# Whether or not an RTTUI should be opened after flashing.
30+
# This is exclusive and cannot be used with GDB at the moment.
31+
enabled = true
32+
# A list of channel associations to be displayed. If left empty, all channels are displayed.
33+
channels = [
34+
# { up = 0, down = 0, name = "name" }
35+
]
36+
# The duration in ms for which the logger should retry to attach to RTT.
37+
timeout = 3000
38+
# Whether timestamps in the RTTUI are enabled
39+
show_timestamps = true
40+
41+
[default.gdb]
42+
# Whether or not a GDB server should be opened after flashing.
43+
# This is exclusive and cannot be used with RTT at the moment.
44+
enabled = false
45+
# The connection string in host:port format wher the GDB server will open a socket.
46+
# gdb_connection_string

‎examples/twim-demo/src/main.rs

Lines changed: 127 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,127 @@
1+
#![no_std]
2+
#![no_main]
3+
4+
#[allow(unused_imports)]
5+
use embedded_hal::blocking::i2c::{Read, Write};
6+
use embedded_hal::digital::v2::InputPin;
7+
use {
8+
core::{
9+
panic::PanicInfo,
10+
sync::atomic::{compiler_fence, Ordering},
11+
},
12+
hal::{
13+
gpio::{p0::Parts, Input, Pin, PullUp},
14+
gpiote::Gpiote,
15+
pac::TWIM0,
16+
twim::*,
17+
},
18+
nrf52840_hal as hal,
19+
rtic::cyccnt::U32Ext,
20+
rtt_target::{rprintln, rtt_init_print},
21+
};
22+
23+
#[rtic::app(device = crate::hal::pac, peripherals = true, monotonic = rtic::cyccnt::CYCCNT)]
24+
const APP: () = {
25+
struct Resources {
26+
twim: Twim<TWIM0>,
27+
gpiote: Gpiote,
28+
btn1: Pin<Input<PullUp>>,
29+
btn2: Pin<Input<PullUp>>,
30+
btn3: Pin<Input<PullUp>>,
31+
btn4: Pin<Input<PullUp>>,
32+
}
33+
34+
#[init]
35+
fn init(mut ctx: init::Context) -> init::LateResources {
36+
let _clocks = hal::clocks::Clocks::new(ctx.device.CLOCK).enable_ext_hfosc();
37+
ctx.core.DCB.enable_trace();
38+
ctx.core.DWT.enable_cycle_counter();
39+
rtt_init_print!();
40+
41+
let p0 = Parts::new(ctx.device.P0);
42+
let scl = p0.p0_30.into_floating_input().degrade();
43+
let sda = p0.p0_31.into_floating_input().degrade();
44+
let btn1 = p0.p0_11.into_pullup_input().degrade();
45+
let btn2 = p0.p0_12.into_pullup_input().degrade();
46+
let btn3 = p0.p0_24.into_pullup_input().degrade();
47+
let btn4 = p0.p0_25.into_pullup_input().degrade();
48+
49+
let gpiote = Gpiote::new(ctx.device.GPIOTE);
50+
gpiote.port().input_pin(&btn1).low();
51+
gpiote.port().input_pin(&btn2).low();
52+
gpiote.port().input_pin(&btn3).low();
53+
gpiote.port().input_pin(&btn4).low();
54+
gpiote.port().enable_interrupt();
55+
56+
let twim = Twim::new(ctx.device.TWIM0, Pins { scl, sda }, Frequency::K100);
57+
58+
init::LateResources {
59+
twim,
60+
gpiote,
61+
btn1,
62+
btn2,
63+
btn3,
64+
btn4,
65+
}
66+
}
67+
68+
#[idle]
69+
fn idle(_: idle::Context) -> ! {
70+
rprintln!("Press button 1 to READ from addr 0x1A");
71+
rprintln!("Press button 2 to WRITE to addr 0x1A");
72+
rprintln!("Press button 3 to READ from addr 0x1B");
73+
rprintln!("Press button 4 to WRITE from addr 0x1B");
74+
loop {
75+
cortex_m::asm::wfi();
76+
}
77+
}
78+
79+
#[task(binds = GPIOTE, resources = [gpiote], schedule = [debounce])]
80+
fn on_gpiote(ctx: on_gpiote::Context) {
81+
ctx.resources.gpiote.reset_events();
82+
ctx.schedule.debounce(ctx.start + 3_000_000.cycles()).ok();
83+
}
84+
85+
#[task(resources = [twim, gpiote, btn1, btn2, btn3, btn4])]
86+
fn debounce(ctx: debounce::Context) {
87+
let twim = ctx.resources.twim;
88+
if ctx.resources.btn1.is_low().unwrap() {
89+
rprintln!("\nREAD from address 0x1A");
90+
let rx_buf = &mut [0; 8][..];
91+
let res = twim.read(0x1A, rx_buf);
92+
rprintln!("Result: {:?}\n{:?}", res, rx_buf);
93+
}
94+
if ctx.resources.btn2.is_low().unwrap() {
95+
rprintln!("\nWRITE to address 0x1A");
96+
let tx_buf = [1, 2, 3, 4, 5, 6, 7, 8];
97+
let res = twim.write(0x1A, &tx_buf[..]);
98+
rprintln!("Result: {:?}\n{:?}", res, tx_buf);
99+
}
100+
if ctx.resources.btn3.is_low().unwrap() {
101+
rprintln!("\nREAD from address 0x1B");
102+
let rx_buf = &mut [0; 4][..];
103+
let res = twim.read(0x1B, rx_buf);
104+
rprintln!("Result: {:?}\n{:?}", res, rx_buf);
105+
}
106+
if ctx.resources.btn4.is_low().unwrap() {
107+
rprintln!("\nWRITE to address 0x1B");
108+
let tx_buf = [9, 10, 11, 12];
109+
let res = twim.write(0x1B, &tx_buf[..]);
110+
rprintln!("Result: {:?}\n{:?}", res, tx_buf);
111+
}
112+
}
113+
114+
extern "C" {
115+
fn SWI0_EGU0();
116+
}
117+
};
118+
119+
#[inline(never)]
120+
#[panic_handler]
121+
fn panic(info: &PanicInfo) -> ! {
122+
cortex_m::interrupt::disable();
123+
rprintln!("{}", info);
124+
loop {
125+
compiler_fence(Ordering::SeqCst);
126+
}
127+
}

0 commit comments

Comments
 (0)