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lines changed Original file line number Diff line number Diff line change @@ -178,6 +178,8 @@ where
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7 => self . 0 . ch [ 0 ] . pselp . write ( |w| w. pselp ( ) . analog_input7 ( ) ) ,
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#[ cfg( not( feature = "9160" ) ) ]
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8 => self . 0 . ch [ 0 ] . pselp . write ( |w| w. pselp ( ) . vdd ( ) ) ,
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+ #[ cfg( not( feature = "9160" ) ) ]
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+ 13 => self . 0 . ch [ 0 ] . pselp . write ( |w| w. pselp ( ) . vddhdiv5 ( ) ) ,
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// This can never happen the only analog pins have already been defined
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// PAY CLOSE ATTENTION TO ANY CHANGES TO THIS IMPL OR THE `channel_mappings!` MACRO
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_ => unsafe { unreachable_unchecked ( ) } ,
@@ -265,3 +267,16 @@ impl Channel<Saadc> for InternalVdd {
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#[ cfg( not( feature = "9160" ) ) ]
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/// Channel that doesn't sample a pin, but the internal VDD voltage.
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pub struct InternalVdd ;
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+
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+ #[ cfg( not( feature = "9160" ) ) ]
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+ impl Channel < Saadc > for InternalVddHdiv5 {
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+ type ID = u8 ;
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+
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+ fn channel ( ) -> <Self as embedded_hal:: adc:: Channel < Saadc > >:: ID {
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+ 13
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+ }
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+ }
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+
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+ #[ cfg( not( feature = "9160" ) ) ]
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+ /// Channel that doesn't sample a pin, but the internal VDD voltage.
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+ pub struct InternalVddHdiv5 ;
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