@@ -351,26 +351,12 @@ impl UsbBus for Usbd {
351
351
}
352
352
}
353
353
354
- // XXX this is not spec compliant; the endpoints should only be enabled after the device
355
- // has been put in the Configured state. However, usb-device provides no hook to do that
356
354
// TODO: Merge `used_{in,out}` with `iso_{in,out}_used` so ISO is enabled here as well.
357
355
// Make the enabled endpoints respond to traffic.
358
356
unsafe {
359
357
regs. epinen . write ( |w| w. bits ( self . used_in . into ( ) ) ) ;
360
358
regs. epouten . write ( |w| w. bits ( self . used_out . into ( ) ) ) ;
361
359
}
362
-
363
- for i in 1 ..8 {
364
- let out_enabled = self . used_out & ( 1 << i) != 0 ;
365
-
366
- // when first enabled, bulk/interrupt OUT endpoints will *not* receive data (the
367
- // peripheral will NAK all incoming packets) until we write a zero to the SIZE
368
- // register (see figure 203 of the 52840 manual). To avoid that we write a 0 to the
369
- // SIZE register
370
- if out_enabled {
371
- regs. size . epout [ i] . reset ( ) ;
372
- }
373
- }
374
360
} ) ;
375
361
}
376
362
@@ -515,27 +501,10 @@ impl UsbBus for Usbd {
515
501
return Err ( UsbError :: WouldBlock ) ;
516
502
}
517
503
518
- // the above check indicates the DMA transfer is complete
519
- dma_end ( ) ;
520
-
521
504
regs. events_endepout [ i] . reset ( ) ;
522
505
523
- let epout = [
524
- & regs. epout0 ,
525
- & regs. epout1 ,
526
- & regs. epout2 ,
527
- & regs. epout3 ,
528
- & regs. epout4 ,
529
- & regs. epout5 ,
530
- & regs. epout6 ,
531
- & regs. epout7 ,
532
- ] ;
533
-
534
506
// How much was transferred?
535
- // as soon as the DMA transfer is over the peripheral will start receiving new packets
536
- // and may overwrite the SIZE register so read the MAXCNT register, which contains the
537
- // SIZE of the last OUT packet, instead
538
- let len = epout[ i] . maxcnt . read ( ) . maxcnt ( ) . bits ( ) ;
507
+ let len = regs. size . epout [ i] . read ( ) . size ( ) . bits ( ) ;
539
508
540
509
if usize:: from ( len) > buf. len ( ) {
541
510
return Err ( UsbError :: BufferOverflow ) ;
@@ -551,17 +520,17 @@ impl UsbBus for Usbd {
551
520
let slice = unsafe { slice:: from_raw_parts ( ptr, usize:: from ( len) ) } ;
552
521
buf[ ..usize:: from ( len) ] . copy_from_slice ( slice) ;
553
522
523
+ // Done copying. Now we need to allow the EP to receive the next packet (ie. clear NAK).
524
+ // This is done by writing anything to `SIZE.EPOUT[i]`.
525
+ // Safety note: This effectively starts DMA, so we need a corresponding barrier.
526
+ dma_start ( ) ;
527
+ regs. size . epout [ i] . reset ( ) ;
528
+
554
529
Ok ( usize:: from ( len) )
555
530
} )
556
531
}
557
532
558
533
fn set_stalled ( & self , ep_addr : EndpointAddress , stalled : bool ) {
559
- semidap:: trace!(
560
- "Usbd::set_stalled(index={}, stalled={})" ,
561
- ep_addr. index( ) as u8 ,
562
- stalled as u8
563
- ) ;
564
-
565
534
interrupt:: free ( |cs| {
566
535
let regs = self . periph . borrow ( cs) ;
567
536
@@ -658,33 +627,6 @@ impl UsbBus for Usbd {
658
627
// The associated buffer is free again.
659
628
in_bufs_in_use. set ( in_bufs_in_use. get ( ) & !( 1 << i) ) ;
660
629
}
661
-
662
- // (see figure 203 of 52840-PS )
663
- // OUT endpoints are buffered; incoming packets will first be copied
664
- // into the peripheral's internal memory (not visible to us). That event is
665
- // reported as an EPDATA event that updates the EPDATASTATUS register
666
- // what we must do at that stage is start a DMA transfer from that hidden
667
- // memory to RAM. we start that transfer right here
668
- let offset = 16 + i;
669
- if regs. epdatastatus . read ( ) . bits ( ) & ( 1 << offset) != 0 {
670
- // MAXCNT must match SIZE
671
- let size = regs. size . epout [ i] . read ( ) . bits ( ) ;
672
- let epout = [
673
- & regs. epout0 ,
674
- & regs. epout1 ,
675
- & regs. epout2 ,
676
- & regs. epout3 ,
677
- & regs. epout4 ,
678
- & regs. epout5 ,
679
- & regs. epout6 ,
680
- & regs. epout7 ,
681
- ] ;
682
- epout[ i] . maxcnt . write ( |w| unsafe { w. bits ( size) } ) ;
683
- dma_start ( ) ;
684
- regs. tasks_startepout [ i] . write ( |w| w. tasks_startepout ( ) . set_bit ( ) ) ;
685
- // clear flag so we don't start the DMA transfer more than once
686
- regs. epdatastatus . write ( |w| unsafe { w. bits ( 1 << offset) } ) ;
687
- }
688
630
}
689
631
690
632
if regs. events_endepout [ i]
0 commit comments