@@ -12,6 +12,7 @@ use core::fmt;
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use crate :: target:: {
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uarte0_ns as uarte0,
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UARTE0_NS as UARTE0 ,
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+ UARTE1_NS as UARTE1 ,
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} ;
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#[ cfg( not( feature="9160" ) ) ]
@@ -123,7 +124,8 @@ impl<T> Uarte<T> where T: Instance {
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return Err ( Error :: TxBufferTooLong ) ;
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}
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- if !crate :: slice_in_ram ( tx_buffer) {
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+ // We can only DMA out of RAM
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+ if !crate :: slice_in_ram ( tx_buffer) {
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return Err ( Error :: BufferNotInRAM ) ;
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}
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@@ -133,8 +135,8 @@ impl<T> Uarte<T> where T: Instance {
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compiler_fence ( SeqCst ) ;
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// Reset the events.
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- self . 0 . events_endtx . write ( |w| w ) ;
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- self . 0 . events_txstopped . write ( |w| w ) ;
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+ self . 0 . events_endtx . reset ( ) ;
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+ self . 0 . events_txstopped . reset ( ) ;
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// Set up the DMA write
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self . 0 . txd . ptr . write ( |w|
@@ -180,6 +182,12 @@ impl<T> Uarte<T> where T: Instance {
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return Err ( Error :: Transmit ) ;
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}
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+ // Lower power consumption by disabling the transmitter once we're
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+ // finished
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+ self . 0 . tasks_stoptx . write ( |w|
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+ // `1` is a valid value to write to task registers.
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+ unsafe { w. bits ( 1 ) } ) ;
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+
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Ok ( ( ) )
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}
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@@ -384,3 +392,6 @@ pub enum Error {
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pub trait Instance : Deref < Target = uarte0:: RegisterBlock > { }
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impl Instance for UARTE0 { }
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+
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+ #[ cfg( feature="9160" ) ]
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+ impl Instance for UARTE1 { }
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