Add SPIS module

Author: kalkyl

examples/spis-demo/Cargo.toml

@@ -0,0 +1,17 @@
+[package]
+name = "spis-demo"
+version = "0.1.0"
+authors = ["Henrik Alsér"]
+edition = "2018"
+
+# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
+
+[dependencies]
+cortex-m = "0.6.2"
+cortex-m-rtic = "0.5.3"
+rtt-target = {version = "0.2.0", features = ["cortex-m"] }
+nrf52840-hal = { features = ["rt"], path = "../../nrf52840-hal" }
+
+[dependencies.embedded-hal]
+version = "0.2.3"
+features = ["unproven"]

examples/spis-demo/Embed.toml

@@ -0,0 +1,21 @@
+[default.probe]
+protocol = "Swd"
+
+[default.flashing]
+enabled = true
+halt_afterwards = false
+restore_unwritten_bytes = false
+
+[default.general]
+chip = "nRF52840"
+chip_descriptions = []
+log_level = "Warn"
+
+[default.rtt]
+enabled = true
+channels = []
+timeout = 3000
+show_timestamps = true
+
+[default.gdb]
+enabled = false

examples/spis-demo/src/main.rs

@@ -0,0 +1,84 @@
+#![no_std]
+#![no_main]
+
+use {
+    core::{
+        panic::PanicInfo,
+        sync::atomic::{compiler_fence, Ordering},
+    },
+    hal::{gpiote::Gpiote, pac::SPIS0, spis::*},
+    nrf52840_hal as hal,
+    rtt_target::{rprintln, rtt_init_print},
+};
+
+#[rtic::app(device = crate::hal::pac, peripherals = true)]
+const APP: () = {
+    struct Resources {
+        gpiote: Gpiote,
+        transfer: Option<Transfer<SPIS0, &'static mut [u8; 8]>>,
+    }
+
+    #[init]
+    fn init(ctx: init::Context) -> init::LateResources {
+        static mut BUF: [u8; 8] = [0; 8];
+
+        let _clocks = hal::clocks::Clocks::new(ctx.device.CLOCK).enable_ext_hfosc();
+        rtt_init_print!();
+        rprintln!("Send me [u8; 8] over SPI");
+        rprintln!("Press button to reset buffer");
+
+        let p0 = hal::gpio::p0::Parts::new(ctx.device.P0);
+        let cs_pin = p0.p0_25.into_floating_input().degrade();
+        let sck_pin = p0.p0_24.into_floating_input().degrade();
+        let copi_pin = p0.p0_16.into_floating_input().degrade();
+        let cipo_pin = p0.p0_14.into_floating_input().degrade();
+
+        let spis = Spis::new(
+            ctx.device.SPIS0,
+            &sck_pin,
+            &cs_pin,
+            Some(&copi_pin),
+            Some(&cipo_pin),
+        );
+        spis.enable_interrupt(SpisEvent::End);
+
+        let btn = p0.p0_29.into_pullup_input().degrade();
+        let gpiote = Gpiote::new(ctx.device.GPIOTE);
+        gpiote.port().input_pin(&btn).low();
+        gpiote.port().enable_interrupt();
+
+        init::LateResources {
+            gpiote,
+            transfer: spis.transfer(BUF).ok(),
+        }
+    }
+
+    #[task(binds = GPIOTE, resources = [gpiote, transfer])]
+    fn on_gpiote(ctx: on_gpiote::Context) {
+        ctx.resources.gpiote.reset_events();
+        rprintln!("Reset buffer");
+        let (buf, spis) = ctx.resources.transfer.take().unwrap().wait();
+        spis.acquire(); // Acquire the SPIS semaphore to be able to safely update `buf`
+        buf.copy_from_slice(&[0; 8][..]);
+        rprintln!("{:?}", buf);
+        *ctx.resources.transfer = spis.transfer(buf).ok();
+    }
+
+    #[task(binds = SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0, resources = [transfer])]
+    fn on_spis(ctx: on_spis::Context) {
+        let (buf, spis) = ctx.resources.transfer.take().unwrap().wait();
+        spis.reset_event(SpisEvent::End);
+        rprintln!("Received: {:?}", buf);
+        *ctx.resources.transfer = spis.transfer(buf).ok();
+    }
+};
+
+#[inline(never)]
+#[panic_handler]
+fn panic(info: &PanicInfo) -> ! {
+    cortex_m::interrupt::disable();
+    rprintln!("{}", info);
+    loop {
+        compiler_fence(Ordering::SeqCst);
+    }
+}

nrf-hal-common/src/lib.rs

@@ -57,6 +57,8 @@ pub mod saadc;
 pub mod spi;
 #[cfg(not(feature = "51"))]
 pub mod spim;
+#[cfg(not(feature = "51"))]
+pub mod spis;
 #[cfg(not(feature = "9160"))]
 pub mod temp;
 pub mod time;