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Add non-blocking DMA rx & tx api, add demo
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6 files changed

+387
-30
lines changed

6 files changed

+387
-30
lines changed

examples/twis-demo/src/main.rs

Lines changed: 5 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -43,7 +43,7 @@ const APP: () = {
4343
let sda = p0.p0_16.into_floating_input().degrade();
4444

4545
let twis = Twis::new(ctx.device.TWIS0, Pins { scl, sda }, ADDR0);
46-
twis.address1(ADDR1) // Add a secondary i2c address
46+
twis.set_address1(ADDR1) // Add a secondary i2c address
4747
.enable_interrupt(TwiEvent::Write) // Trigger interrupt on WRITE command
4848
.enable_interrupt(TwiEvent::Read) // Trigger interrupt on READ command
4949
.enable();
@@ -73,11 +73,11 @@ const APP: () = {
7373
rprintln!("Writing data to controller...");
7474
match twis.address_match() {
7575
ADDR0 => {
76-
let res = twis.tx(&buffer0[..]);
76+
let res = twis.tx_blocking(&buffer0[..]);
7777
rprintln!("Result: {:?}\n{:?}", res, buffer0);
7878
}
7979
ADDR1 => {
80-
let res = twis.tx(&buffer1[..]);
80+
let res = twis.tx_blocking(&buffer1[..]);
8181
rprintln!("Result: {:?}\n{:?}", res, buffer1);
8282
}
8383
_ => unreachable!(),
@@ -90,11 +90,11 @@ const APP: () = {
9090
rprintln!("Reading data from controller...");
9191
match twis.address_match() {
9292
ADDR0 => {
93-
let res = twis.rx(&mut buffer0[..]);
93+
let res = twis.rx_blocking(&mut buffer0[..]);
9494
rprintln!("Result: {:?}\n{:?}", res, buffer0);
9595
}
9696
ADDR1 => {
97-
let res = twis.rx(&mut buffer1[..]);
97+
let res = twis.rx_blocking(&mut buffer1[..]);
9898
rprintln!("Result: {:?}\n{:?}", res, buffer1);
9999
}
100100
_ => unreachable!(),

examples/twis-dma-demo/Cargo.toml

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,17 @@
1+
[package]
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name = "twis-dma-demo"
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version = "0.1.0"
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authors = ["Henrik Alsér"]
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edition = "2018"
6+
7+
# See more keys and their definitions at https://doc.rust-lang.org/cargo/reference/manifest.html
8+
9+
[dependencies]
10+
cortex-m = "0.6.2"
11+
cortex-m-rtic = "0.5.3"
12+
rtt-target = {version = "0.2.0", features = ["cortex-m"] }
13+
nrf52840-hal = { features = ["rt"], path = "../../nrf52840-hal" }
14+
15+
[dependencies.embedded-hal]
16+
version = "0.2.3"
17+
features = ["unproven"]

examples/twis-dma-demo/Embed.toml

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
[default.probe]
2+
# The index of the probe in the connected probe list.
3+
# probe_index = 0
4+
# The protocol to be used for communicating with the target.
5+
protocol = "Swd"
6+
# The speed in kHz of the data link to the target.
7+
# speed = 1337
8+
9+
[default.flashing]
10+
# Whether or not the target should be flashed.
11+
enabled = true
12+
# Whether or not the target should be halted after flashing.
13+
halt_afterwards = false
14+
# Whether or not bytes erased but not rewritten with data from the ELF
15+
# should be restored with their contents before erasing.
16+
restore_unwritten_bytes = false
17+
# The path where an SVG of the assembled flash layout should be written to.
18+
# flash_layout_output_path = "out.svg"
19+
20+
[default.general]
21+
# The chip name of the chip to be debugged.
22+
chip = "nRF52840"
23+
# A list of chip descriptions to be loaded during runtime.
24+
chip_descriptions = []
25+
# The default log level to be used.
26+
log_level = "Warn"
27+
28+
[default.rtt]
29+
# Whether or not an RTTUI should be opened after flashing.
30+
# This is exclusive and cannot be used with GDB at the moment.
31+
enabled = true
32+
# A list of channel associations to be displayed. If left empty, all channels are displayed.
33+
channels = [
34+
# { up = 0, down = 0, name = "name" }
35+
]
36+
# The duration in ms for which the logger should retry to attach to RTT.
37+
timeout = 3000
38+
# Whether timestamps in the RTTUI are enabled
39+
show_timestamps = true
40+
41+
[default.gdb]
42+
# Whether or not a GDB server should be opened after flashing.
43+
# This is exclusive and cannot be used with RTT at the moment.
44+
enabled = false
45+
# The connection string in host:port format wher the GDB server will open a socket.
46+
# gdb_connection_string

examples/twis-dma-demo/src/main.rs

Lines changed: 77 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,77 @@
1+
#![no_std]
2+
#![no_main]
3+
4+
use {
5+
core::{
6+
panic::PanicInfo,
7+
sync::atomic::{compiler_fence, Ordering},
8+
},
9+
hal::{gpio::p0::Parts, pac::TWIS0, twis::*},
10+
nrf52840_hal as hal,
11+
rtt_target::{rprintln, rtt_init_print},
12+
};
13+
14+
pub enum TwisTransfer {
15+
Running(Transfer<TWIS0, &'static mut [u8; 8]>),
16+
Idle((&'static mut [u8; 8], Twis<TWIS0>)),
17+
}
18+
19+
#[rtic::app(device = crate::hal::pac, peripherals = true)]
20+
const APP: () = {
21+
struct Resources {
22+
transfer: Option<TwisTransfer>,
23+
}
24+
25+
#[init]
26+
fn init(ctx: init::Context) -> init::LateResources {
27+
static mut BUF: [u8; 8] = [0; 8];
28+
let _clocks = hal::clocks::Clocks::new(ctx.device.CLOCK).enable_ext_hfosc();
29+
rtt_init_print!();
30+
rprintln!("Waiting for commands from controller...");
31+
32+
let p0 = Parts::new(ctx.device.P0);
33+
let scl = p0.p0_14.into_floating_input().degrade();
34+
let sda = p0.p0_16.into_floating_input().degrade();
35+
36+
let twis = Twis::new(ctx.device.TWIS0, Pins { scl, sda }, 0x1A);
37+
twis.enable_interrupt(TwiEvent::Write)
38+
.enable_interrupt(TwiEvent::Read)
39+
.enable_interrupt(TwiEvent::Stopped)
40+
.enable();
41+
42+
init::LateResources {
43+
transfer: Some(TwisTransfer::Idle((BUF, twis))),
44+
}
45+
}
46+
47+
#[task(binds = SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0, resources = [transfer])]
48+
fn on_twis(ctx: on_twis::Context) {
49+
let (buf, twis) = match ctx.resources.transfer.take().unwrap() {
50+
TwisTransfer::Running(t) => t.wait(),
51+
TwisTransfer::Idle(t) => t,
52+
};
53+
if twis.is_event_triggered(TwiEvent::Read) {
54+
twis.reset_event(TwiEvent::Read);
55+
rprintln!("READ command received");
56+
*ctx.resources.transfer = Some(TwisTransfer::Running(twis.tx(buf).unwrap()));
57+
} else if twis.is_event_triggered(TwiEvent::Write) {
58+
twis.reset_event(TwiEvent::Write);
59+
rprintln!("WRITE command received");
60+
*ctx.resources.transfer = Some(TwisTransfer::Running(twis.rx(buf).unwrap()));
61+
} else {
62+
twis.reset_event(TwiEvent::Stopped);
63+
rprintln!("{:?}", buf);
64+
*ctx.resources.transfer = Some(TwisTransfer::Idle((buf, twis)));
65+
}
66+
}
67+
};
68+
69+
#[inline(never)]
70+
#[panic_handler]
71+
fn panic(info: &PanicInfo) -> ! {
72+
cortex_m::interrupt::disable();
73+
rprintln!("{}", info);
74+
loop {
75+
compiler_fence(Ordering::SeqCst);
76+
}
77+
}

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