66//! * Different events are used to initiate transfers.
77//! * No notification when the status stage is ACK'd.
88
9+ use bare_metal:: Mutex ;
910use core:: cell:: Cell ;
1011use core:: mem:: MaybeUninit ;
1112use core:: sync:: atomic:: { compiler_fence, Ordering } ;
12- use cortex_m :: interrupt :: { self , CriticalSection , Mutex } ;
13+ use critical_section :: CriticalSection ;
1314use usb_device:: {
1415 bus:: { PollResult , UsbBus , UsbBusAllocator } ,
1516 endpoint:: { EndpointAddress , EndpointType } ,
@@ -244,8 +245,8 @@ impl<T: UsbPeripheral> UsbBus for Usbd<T> {
244245
245246 #[ inline]
246247 fn enable ( & mut self ) {
247- interrupt :: free ( |cs| {
248- let regs = self . regs ( cs) ;
248+ critical_section :: with ( move |cs| {
249+ let regs = self . regs ( & cs) ;
249250
250251 errata:: pre_enable ( ) ;
251252
@@ -264,8 +265,8 @@ impl<T: UsbPeripheral> UsbBus for Usbd<T> {
264265
265266 #[ inline]
266267 fn reset ( & self ) {
267- interrupt :: free ( |cs| {
268- let regs = self . regs ( cs) ;
268+ critical_section :: with ( move |cs| {
269+ let regs = self . regs ( & cs) ;
269270
270271 // TODO: Initialize ISO buffers
271272
@@ -310,8 +311,8 @@ impl<T: UsbPeripheral> UsbBus for Usbd<T> {
310311
311312 // A 0-length write to Control EP 0 is a status stage acknowledging a control write xfer
312313 if ep_addr. index ( ) == 0 && buf. is_empty ( ) {
313- let exit = interrupt :: free ( |cs| {
314- let regs = self . regs ( cs) ;
314+ let exit = critical_section :: with ( move |cs| {
315+ let regs = self . regs ( & cs) ;
315316
316317 let ep0_state = self . ep0_state . borrow ( cs) . get ( ) ;
317318
@@ -349,8 +350,8 @@ impl<T: UsbPeripheral> UsbBus for Usbd<T> {
349350 return Err ( UsbError :: BufferOverflow ) ;
350351 }
351352
352- interrupt :: free ( |cs| {
353- let regs = self . regs ( cs) ;
353+ critical_section :: with ( move |cs| {
354+ let regs = self . regs ( & cs) ;
354355 let busy_in_endpoints = self . busy_in_endpoints . borrow ( cs) ;
355356
356357 if busy_in_endpoints. get ( ) & ( 1 << i) != 0 {
@@ -462,8 +463,8 @@ impl<T: UsbPeripheral> UsbBus for Usbd<T> {
462463 }
463464
464465 let i = ep_addr. index ( ) ;
465- interrupt :: free ( |cs| {
466- let regs = self . regs ( cs) ;
466+ critical_section :: with ( move |cs| {
467+ let regs = self . regs ( & cs) ;
467468
468469 // Control EP 0 is special
469470 if i == 0 {
@@ -551,8 +552,8 @@ impl<T: UsbPeripheral> UsbBus for Usbd<T> {
551552 }
552553
553554 fn set_stalled ( & self , ep_addr : EndpointAddress , stalled : bool ) {
554- interrupt :: free ( |cs| {
555- let regs = self . regs ( cs) ;
555+ critical_section :: with ( move |cs| {
556+ let regs = self . regs ( & cs) ;
556557
557558 unsafe {
558559 if ep_addr. index ( ) == 0 {
@@ -578,8 +579,8 @@ impl<T: UsbPeripheral> UsbBus for Usbd<T> {
578579 }
579580
580581 fn is_stalled ( & self , ep_addr : EndpointAddress ) -> bool {
581- interrupt :: free ( |cs| {
582- let regs = self . regs ( cs) ;
582+ critical_section :: with ( move |cs| {
583+ let regs = self . regs ( & cs) ;
583584
584585 let i = ep_addr. index ( ) ;
585586 match ep_addr. direction ( ) {
@@ -591,16 +592,16 @@ impl<T: UsbPeripheral> UsbBus for Usbd<T> {
591592
592593 #[ inline]
593594 fn suspend ( & self ) {
594- interrupt :: free ( |cs| {
595- let regs = self . regs ( cs) ;
595+ critical_section :: with ( move |cs| {
596+ let regs = self . regs ( & cs) ;
596597 regs. lowpower . write ( |w| w. lowpower ( ) . low_power ( ) ) ;
597598 } ) ;
598599 }
599600
600601 #[ inline]
601602 fn resume ( & self ) {
602- interrupt :: free ( |cs| {
603- let regs = self . regs ( cs) ;
603+ critical_section :: with ( move |cs| {
604+ let regs = self . regs ( & cs) ;
604605
605606 errata:: pre_wakeup ( ) ;
606607
@@ -609,8 +610,8 @@ impl<T: UsbPeripheral> UsbBus for Usbd<T> {
609610 }
610611
611612 fn poll ( & self ) -> PollResult {
612- interrupt :: free ( |cs| {
613- let regs = self . regs ( cs) ;
613+ critical_section :: with ( move |cs| {
614+ let regs = self . regs ( & cs) ;
614615 let busy_in_endpoints = self . busy_in_endpoints . borrow ( cs) ;
615616
616617 if regs. events_usbreset . read ( ) . events_usbreset ( ) . bit_is_set ( ) {
@@ -726,16 +727,16 @@ impl<T: UsbPeripheral> UsbBus for Usbd<T> {
726727 }
727728
728729 fn force_reset ( & self ) -> usb_device:: Result < ( ) > {
729- interrupt :: free ( |cs| {
730- self . regs ( cs) . usbpullup . write ( |w| w. connect ( ) . disabled ( ) ) ;
730+ critical_section :: with ( move |cs| {
731+ self . regs ( & cs) . usbpullup . write ( |w| w. connect ( ) . disabled ( ) ) ;
731732 } ) ;
732733
733734 // Delay for 1ms, to give the host a chance to detect this.
734735 // We run at 64 MHz, so 64k cycles are 1ms.
735736 cortex_m:: asm:: delay ( 64_000 ) ;
736737
737- interrupt :: free ( |cs| {
738- self . regs ( cs) . usbpullup . write ( |w| w. connect ( ) . enabled ( ) ) ;
738+ critical_section :: with ( move |cs| {
739+ self . regs ( & cs) . usbpullup . write ( |w| w. connect ( ) . enabled ( ) ) ;
739740 } ) ;
740741
741742 Ok ( ( ) )
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