samples: Cleanup nRF54LM20 port

- We cannot set full 512 kB RAM - we have only 511 kB, so let's
use the default settings.
- For MCUBoot and external flash disable external driver check.
- Add samples's build dirs to gitignore

Signed-off-by: Arkadiusz Balys <arkadiusz.balys@nordicsemi.no>

Author: ArekBalysNordic

.gitignore

@@ -10,6 +10,7 @@ __pycache__/
 # build
 /build*
 /twister-out*
+/samples/*/build*
 
 # docs
 /docs/_build*

samples/light_bulb/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay

@@ -17,16 +17,6 @@
 	};
 };
 
-// restore full RRAM and SRAM space - by default some parts are dedicated to FLRP
-&cpuapp_rram {
-	reg = <0x0 DT_SIZE_K(2036)>;
-};
-
-&cpuapp_sram {
-	reg = <0x20000000 DT_SIZE_K(512)>;
-	ranges = <0x0 0x20000000 DT_SIZE_K(512)>;
-};
-
 &pwm20 {
 	status = "okay";
 	pinctrl-0 = <&pwm_default>;

samples/light_switch/Kconfig.sysbuild

@@ -42,6 +42,13 @@ config DFU_MULTI_IMAGE_PACKAGE_NET
 
 endif # SOC_SERIES_NRF53X
 
+if BOARD_NRF54LM20DK
+
+config PM_OVERRIDE_EXTERNAL_DRIVER_CHECK
+	default y
+
+endif # BOARD_NRF54LM20DK
+
 endif # BOOTLOADER_MCUBOOT
 
 source "${ZEPHYR_BASE}/share/sysbuild/Kconfig"

samples/light_switch/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay

@@ -45,15 +45,6 @@
 	};
 };
 
-/* Restore full RRAM and SRAM */
-&cpuapp_rram {
-	reg = <0x0 DT_SIZE_K(2036)>;
-};
-
-&cpuapp_sram {
-	reg = <0x20000000 DT_SIZE_K(512)>;
-};
-
 &timer24 {
 	status = "okay";
 };

samples/light_switch/sysbuild/mcuboot/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay

@@ -10,16 +10,6 @@
 	};
 };
 
-// restore full RRAM and SRAM space - by default some parts are dedicated to FLRP
-&cpuapp_rram {
-	reg = <0x0 DT_SIZE_K(2036)>;
-};
-
-&cpuapp_sram {
-	reg = <0x20000000 DT_SIZE_K(512)>;
-	ranges = <0x0 0x20000000  0x80000>;
-};
-
 &mx25r64 {
 	status = "okay";
 };

samples/ncp/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay

@@ -13,15 +13,6 @@
 	};
 };
 
-/* Restore full RRAM and SRAM */
-&cpuapp_rram {
-	reg = <0x0 DT_SIZE_K(2036)>;
-};
-
-&cpuapp_sram {
-	reg = <0x20000000 DT_SIZE_K(512)>;
-};
-
 &pinctrl {
 	uart21_default: uart21_default {
 		group1 {

samples/network_coordinator/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay

@@ -17,16 +17,6 @@
 	};
 };
 
-// restore full RRAM and SRAM space - by default some parts are dedicated to FLRP
-&cpuapp_rram {
-	reg = <0x0 DT_SIZE_K(2036)>;
-};
-
-&cpuapp_sram {
-	reg = <0x20000000 DT_SIZE_K(512)>;
-	ranges = <0x0 0x20000000 DT_SIZE_K(512)>;
-};
-
 &pwm20 {
 	status = "okay";
 	pinctrl-0 = <&pwm_default>;

samples/shell/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay

@@ -10,15 +10,6 @@
 	};
 };
 
-/* Restore full RRAM and SRAM */
-&cpuapp_rram {
-	reg = <0x0 DT_SIZE_K(2036)>;
-};
-
-&cpuapp_sram {
-	reg = <0x20000000 DT_SIZE_K(512)>;
-};
-
 &timer24 {
 	status = "okay";
 };

samples/template/boards/nrf54lm20dk_nrf54lm20a_cpuapp.overlay

@@ -10,15 +10,6 @@
 	};
 };
 
-/* Restore full RRAM and SRAM */
-&cpuapp_rram {
-	reg = <0x0 DT_SIZE_K(2036)>;
-};
-
-&cpuapp_sram {
-	reg = <0x20000000 DT_SIZE_K(512)>;
-};
-
 &timer24 {
 	status = "okay";
 };