diff --git a/boards/nordic/bm_nrf54l15dk/Kconfig.bm_nrf54l15dk b/boards/nordic/bm_nrf54l15dk/Kconfig.bm_nrf54l15dk index d77b9b82fd..cbddfaed3b 100644 --- a/boards/nordic/bm_nrf54l15dk/Kconfig.bm_nrf54l15dk +++ b/boards/nordic/bm_nrf54l15dk/Kconfig.bm_nrf54l15dk @@ -5,6 +5,15 @@ # config BOARD_BM_NRF54L15DK - select SOC_NRF54L05_CPUAPP if BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S115_SOFTDEVICE || BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S115_SOFTDEVICE_MCUBOOT - select SOC_NRF54L10_CPUAPP if BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S115_SOFTDEVICE || BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S115_SOFTDEVICE_MCUBOOT - select SOC_NRF54L15_CPUAPP if BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE || BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE_MCUBOOT + select SOC_NRF54L05_CPUAPP if BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S115_SOFTDEVICE || \ + BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S115_SOFTDEVICE_MCUBOOT || \ + BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S145_SOFTDEVICE || \ + BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S145_SOFTDEVICE_MCUBOOT + select SOC_NRF54L10_CPUAPP if BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S115_SOFTDEVICE || \ + BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S115_SOFTDEVICE_MCUBOOT || \ + BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S145_SOFTDEVICE || \ + BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S145_SOFTDEVICE_MCUBOOT + select SOC_NRF54L15_CPUAPP if BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE || \ + BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE_MCUBOOT || \ + BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S145_SOFTDEVICE || \ + BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S145_SOFTDEVICE_MCUBOOT diff --git a/boards/nordic/bm_nrf54l15dk/Kconfig.sysbuild b/boards/nordic/bm_nrf54l15dk/Kconfig.sysbuild index fe89bff61c..73a033e70f 100644 --- a/boards/nordic/bm_nrf54l15dk/Kconfig.sysbuild +++ b/boards/nordic/bm_nrf54l15dk/Kconfig.sysbuild @@ -18,9 +18,38 @@ choice SOFTDEVICE_SELECTION default SOFTDEVICE_S115 endchoice +endif # BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S115_SOFTDEVICE || \ + # BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S115_SOFTDEVICE || \ + # BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE || \ + # BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S115_SOFTDEVICE_MCUBOOT || \ + # BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S115_SOFTDEVICE_MCUBOOT || \ + # BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE_MCUBOOT + +if BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S145_SOFTDEVICE || \ + BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S145_SOFTDEVICE || \ + BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S145_SOFTDEVICE || \ + BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S145_SOFTDEVICE_MCUBOOT || \ + BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S145_SOFTDEVICE_MCUBOOT || \ + BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S145_SOFTDEVICE_MCUBOOT + +choice SOFTDEVICE_SELECTION + default SOFTDEVICE_S145 +endchoice + +endif # BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S145_SOFTDEVICE || \ + # BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S145_SOFTDEVICE || \ + # BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S145_SOFTDEVICE || \ + # BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S145_SOFTDEVICE_MCUBOOT || \ + # BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S145_SOFTDEVICE_MCUBOOT || \ + # BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S145_SOFTDEVICE_MCUBOOT + +# Kconfigs for all MCUboot board variants if BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S115_SOFTDEVICE_MCUBOOT || \ BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S115_SOFTDEVICE_MCUBOOT || \ - BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE_MCUBOOT + BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE_MCUBOOT || \ + BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S145_SOFTDEVICE_MCUBOOT || \ + BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S145_SOFTDEVICE_MCUBOOT || \ + BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S145_SOFTDEVICE_MCUBOOT choice BM_BOOTLOADER default BM_BOOTLOADER_MCUBOOT @@ -35,11 +64,7 @@ config BM_BOOTLOADER_MCUBOOT_FIRMWARE_LOADER_ENTRANCE_BOOT_MODE endif # BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S115_SOFTDEVICE_MCUBOOT || # BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S115_SOFTDEVICE_MCUBOOT || - # BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE_MCUBOOT - -endif # BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S115_SOFTDEVICE || - # BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S115_SOFTDEVICE || - # BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE || - # BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S115_SOFTDEVICE_MCUBOOT || - # BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S115_SOFTDEVICE_MCUBOOT || - # BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE_MCUBOOT + # BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S115_SOFTDEVICE_MCUBOOT || + # BOARD_BM_NRF54L15DK_NRF54L05_CPUAPP_S145_SOFTDEVICE_MCUBOOT || + # BOARD_BM_NRF54L15DK_NRF54L10_CPUAPP_S145_SOFTDEVICE_MCUBOOT || + # BOARD_BM_NRF54L15DK_NRF54L15_CPUAPP_S145_SOFTDEVICE_MCUBOOT diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice.dts b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice.dts new file mode 100644 index 0000000000..11d3d6ec89 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice.dts @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +/dts-v1/; + +#include +#include "bm_nrf54l15dk_nrf54l05_cpuapp_common.dtsi" + +/ { + chosen { + zephyr,flash = &cpuapp_rram; + zephyr,code-partition = &slot0_partition; + zephyr,sram = &app_ram; + }; +}; + +&cpuapp_rram { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot0_partition: partition@0 { + label = "slot0"; + reg = <0x00000000 DT_SIZE_K(347)>; + }; + + storage_partition: partition@56c00 { + compatible = "fixed-subpartitions"; + label = "storage"; + reg = <0x00056c00 DT_SIZE_K(8)>; + ranges = <0x0 0x56c00 DT_SIZE_K(8)>; + #address-cells = <1>; + #size-cells = <1>; + + peer_manager_partition: partition@0 { + label = "peer_manager"; + reg = <0x00000000 DT_SIZE_K(4)>; + }; + + storage0_partition: partition@1000 { + label = "storage0"; + reg = <0x00001000 DT_SIZE_K(4)>; + }; + }; + + softdevice_partition: partition@58c00 { + label = "softdevice"; + reg = <0x00058c00 DT_SIZE_K(144)>; + }; + }; +}; + +&cpuapp_sram { + status = "okay"; + + partitions { + #address-cells = <1>; + #size-cells = <1>; + + softdevice_static_ram: partition@20000080 { + label = "softdevice_static_ram"; + reg = <0x20000080 0x1780>; + }; + + softdevice_dynamic_ram: partition@20001800 { + label = "softdevice_dynamic_ram"; + reg = <0x20001800 DT_SIZE_K(12)>; + }; + + app_ram: partition@20004800 { + label = "app_ram"; + reg = <0x20004800 DT_SIZE_K(77)>; + }; + }; +}; diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice.yaml b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice.yaml new file mode 100644 index 0000000000..b4a58dcd75 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice.yaml @@ -0,0 +1,17 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +identifier: bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice +name: Bare_Metal-nRF54L15-DK-nRF54L05-Application-S145-SoftDevice +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 77 +flash: 347 diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_defconfig b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_defconfig new file mode 100644 index 0000000000..c2087ec652 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_defconfig @@ -0,0 +1,108 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +# Enable console +CONFIG_CONSOLE=y +CONFIG_BM_UARTE_CONSOLE=y + +# Remove boot banner +CONFIG_NCS_BOOT_BANNER=n +CONFIG_BOOT_BANNER=n + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y + +# Disable partition manager +CONFIG_PARTITION_MANAGER_ENABLED=n + +# Disable multithreading +CONFIG_MULTITHREADING=n +CONFIG_ZERO_LATENCY_IRQS=y + +# Allow FLASH writes +CONFIG_MPU_ALLOW_FLASH_WRITE=y + +# Shrink +CONFIG_GPIO=n +CONFIG_NRF_SECURITY=n + +# Enable all NRFX drivers +CONFIG_NRFX_CLOCK=y +CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED=y +CONFIG_NRFX_COMP=y +CONFIG_NRFX_DPPI00=y +CONFIG_NRFX_DPPI10=y +CONFIG_NRFX_DPPI20=y +CONFIG_NRFX_DPPI30=y +CONFIG_NRFX_EGU10=y +CONFIG_NRFX_EGU20=y +CONFIG_NRFX_GPIOTE20=y +CONFIG_NRFX_GPIOTE30=y +CONFIG_NRFX_GPPI=y +CONFIG_NRFX_GRTC=y +CONFIG_NRFX_I2S20=y +CONFIG_NRFX_NFCT=y +CONFIG_NRFX_PDM20=y +CONFIG_NRFX_PDM21=y +CONFIG_NRFX_POWER=y +CONFIG_NRFX_PPIB00=y +CONFIG_NRFX_PPIB01=y +CONFIG_NRFX_PPIB10=y +CONFIG_NRFX_PPIB11=y +CONFIG_NRFX_PPIB20=y +CONFIG_NRFX_PPIB21=y +CONFIG_NRFX_PPIB22=y +CONFIG_NRFX_PPIB30=y +CONFIG_NRFX_PWM20=y +CONFIG_NRFX_PWM21=y +CONFIG_NRFX_PWM22=y +CONFIG_NRFX_QDEC20=y +CONFIG_NRFX_QDEC21=y +CONFIG_NRFX_RRAMC=y +CONFIG_NRFX_SAADC=y +CONFIG_NRFX_SPIM00=y +CONFIG_NRFX_SPIM20=y +CONFIG_NRFX_SPIM21=y +CONFIG_NRFX_SPIM22=y +CONFIG_NRFX_SPIM30=y +CONFIG_NRFX_SYSTICK=y +CONFIG_NRFX_TEMP=y +CONFIG_NRFX_TIMER00=y +CONFIG_NRFX_TIMER10=y +CONFIG_NRFX_TIMER20=y +CONFIG_NRFX_TIMER21=y +CONFIG_NRFX_TIMER22=y +CONFIG_NRFX_TIMER23=y +CONFIG_NRFX_TIMER24=y +CONFIG_NRFX_TWIM20=y +CONFIG_NRFX_TWIM21=y +CONFIG_NRFX_TWIM22=y +CONFIG_NRFX_TWIM30=y +CONFIG_NRFX_UARTE00=y +CONFIG_NRFX_UARTE20=y +CONFIG_NRFX_UARTE21=y +CONFIG_NRFX_UARTE22=y +CONFIG_NRFX_UARTE30=y +CONFIG_NRFX_WDT31=y +CONFIG_NRFX_PRS_BOX_0=y +CONFIG_NRFX_PRS_BOX_1=y +CONFIG_NRFX_PRS_BOX_2=y +CONFIG_NRFX_PRS_BOX_3=y +CONFIG_NRFX_PRS_BOX_4=y diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_mcuboot.dts b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_mcuboot.dts new file mode 100644 index 0000000000..3984f09fe7 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_mcuboot.dts @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +/dts-v1/; + +#include +#include "bm_nrf54l15dk_nrf54l05_cpuapp_common.dtsi" + +/ { + sram@20017C00 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0x20017C00 DT_SIZE_K(1)>; + zephyr,memory-region = "RetainedMem"; + status = "okay"; + + retainedmem { + compatible = "zephyr,retained-ram"; + status = "okay"; + #address-cells = <1>; + #size-cells = <1>; + + settings_partition0: settings_partition@0 { + compatible = "zephyr,retention"; + status = "okay"; + reg = <0x0 DT_SIZE_K(1)>; + }; + }; + }; + + chosen { + zephyr,flash = &cpuapp_rram; + zephyr,code-partition = &slot0_partition; + zephyr,sram = &app_ram; + zephyr,settings-partition = &settings_partition0; + }; +}; + +&cpuapp_rram { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "boot"; + reg = <0x00000000 DT_SIZE_K(36)>; + }; + + storage_partition: partition@9000 { + compatible = "fixed-subpartitions"; + label = "storage"; + reg = <0x00009000 DT_SIZE_K(8)>; + ranges = <0x0 0x9000 DT_SIZE_K(8)>; + #address-cells = <1>; + #size-cells = <1>; + + peer_manager_partition: partition@0 { + label = "peer_manager"; + reg = <0x00000000 DT_SIZE_K(4)>; + }; + + storage0_partition: partition@1000 { + label = "storage0"; + reg = <0x00001000 DT_SIZE_K(4)>; + }; + }; + + slot0_partition: partition@b000 { + label = "slot0"; + reg = <0x0000b000 DT_SIZE_K(244)>; + }; + + slot1_partition: partition@48000 { + label = "slot1"; + reg = <0x00048000 DT_SIZE_K(64)>; + }; + + /* 1 kB free space due to slot1_partition partition 2k alignment. */ + + softdevice_partition: partition@58400 { + label = "softdevice"; + reg = <0x00058400 (DT_SIZE_K(146) + 0x200)>; + }; + + metadata_partition: partition@7ce00 { + label = "metadata"; + reg = <0x0007ce00 0x200>; + }; + }; +}; + +&cpuapp_sram { + status = "okay"; + + partitions { + #address-cells = <1>; + #size-cells = <1>; + + softdevice_static_ram: partition@20000080 { + label = "softdevice_static_ram"; + reg = <0x20000080 0x1780>; + }; + + softdevice_dynamic_ram: partition@20001800 { + label = "softdevice_dynamic_ram"; + reg = <0x20001800 DT_SIZE_K(12)>; + }; + + app_ram: partition@20004800 { + label = "app_ram"; + reg = <0x20004800 DT_SIZE_K(77)>; + }; + }; +}; diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_mcuboot.yaml b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_mcuboot.yaml new file mode 100644 index 0000000000..af7d906357 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_mcuboot.yaml @@ -0,0 +1,17 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +identifier: bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot +name: Bare_Metal-nRF54L15-DK-nRF54L05-Application-S145-SoftDevice-MCUboot +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 77 +flash: 244 diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_mcuboot_defconfig b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_mcuboot_defconfig new file mode 100644 index 0000000000..c2087ec652 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l05_cpuapp_s145_softdevice_mcuboot_defconfig @@ -0,0 +1,108 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +# Enable console +CONFIG_CONSOLE=y +CONFIG_BM_UARTE_CONSOLE=y + +# Remove boot banner +CONFIG_NCS_BOOT_BANNER=n +CONFIG_BOOT_BANNER=n + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y + +# Disable partition manager +CONFIG_PARTITION_MANAGER_ENABLED=n + +# Disable multithreading +CONFIG_MULTITHREADING=n +CONFIG_ZERO_LATENCY_IRQS=y + +# Allow FLASH writes +CONFIG_MPU_ALLOW_FLASH_WRITE=y + +# Shrink +CONFIG_GPIO=n +CONFIG_NRF_SECURITY=n + +# Enable all NRFX drivers +CONFIG_NRFX_CLOCK=y +CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED=y +CONFIG_NRFX_COMP=y +CONFIG_NRFX_DPPI00=y +CONFIG_NRFX_DPPI10=y +CONFIG_NRFX_DPPI20=y +CONFIG_NRFX_DPPI30=y +CONFIG_NRFX_EGU10=y +CONFIG_NRFX_EGU20=y +CONFIG_NRFX_GPIOTE20=y +CONFIG_NRFX_GPIOTE30=y +CONFIG_NRFX_GPPI=y +CONFIG_NRFX_GRTC=y +CONFIG_NRFX_I2S20=y +CONFIG_NRFX_NFCT=y +CONFIG_NRFX_PDM20=y +CONFIG_NRFX_PDM21=y +CONFIG_NRFX_POWER=y +CONFIG_NRFX_PPIB00=y +CONFIG_NRFX_PPIB01=y +CONFIG_NRFX_PPIB10=y +CONFIG_NRFX_PPIB11=y +CONFIG_NRFX_PPIB20=y +CONFIG_NRFX_PPIB21=y +CONFIG_NRFX_PPIB22=y +CONFIG_NRFX_PPIB30=y +CONFIG_NRFX_PWM20=y +CONFIG_NRFX_PWM21=y +CONFIG_NRFX_PWM22=y +CONFIG_NRFX_QDEC20=y +CONFIG_NRFX_QDEC21=y +CONFIG_NRFX_RRAMC=y +CONFIG_NRFX_SAADC=y +CONFIG_NRFX_SPIM00=y +CONFIG_NRFX_SPIM20=y +CONFIG_NRFX_SPIM21=y +CONFIG_NRFX_SPIM22=y +CONFIG_NRFX_SPIM30=y +CONFIG_NRFX_SYSTICK=y +CONFIG_NRFX_TEMP=y +CONFIG_NRFX_TIMER00=y +CONFIG_NRFX_TIMER10=y +CONFIG_NRFX_TIMER20=y +CONFIG_NRFX_TIMER21=y +CONFIG_NRFX_TIMER22=y +CONFIG_NRFX_TIMER23=y +CONFIG_NRFX_TIMER24=y +CONFIG_NRFX_TWIM20=y +CONFIG_NRFX_TWIM21=y +CONFIG_NRFX_TWIM22=y +CONFIG_NRFX_TWIM30=y +CONFIG_NRFX_UARTE00=y +CONFIG_NRFX_UARTE20=y +CONFIG_NRFX_UARTE21=y +CONFIG_NRFX_UARTE22=y +CONFIG_NRFX_UARTE30=y +CONFIG_NRFX_WDT31=y +CONFIG_NRFX_PRS_BOX_0=y +CONFIG_NRFX_PRS_BOX_1=y +CONFIG_NRFX_PRS_BOX_2=y +CONFIG_NRFX_PRS_BOX_3=y +CONFIG_NRFX_PRS_BOX_4=y diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice.dts b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice.dts new file mode 100644 index 0000000000..210f611895 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice.dts @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +/dts-v1/; + +#include +#include "bm_nrf54l15dk_nrf54l10_cpuapp_common.dtsi" + +/ { + chosen { + zephyr,flash = &cpuapp_rram; + zephyr,code-partition = &slot0_partition; + zephyr,sram = &app_ram; + }; +}; + +&cpuapp_rram { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot0_partition: partition@0 { + label = "slot0"; + reg = <0x00000000 DT_SIZE_K(859)>; + }; + + storage_partition: partition@d6c00 { + compatible = "fixed-subpartitions"; + label = "storage"; + reg = <0x000d6c00 DT_SIZE_K(8)>; + ranges = <0x0 0xd6c00 DT_SIZE_K(8)>; + #address-cells = <1>; + #size-cells = <1>; + + peer_manager_partition: partition@0 { + label = "peer_manager"; + reg = <0x00000000 DT_SIZE_K(4)>; + }; + + storage0_partition: partition@1000 { + label = "storage0"; + reg = <0x00001000 DT_SIZE_K(4)>; + }; + }; + + softdevice_partition: partition@d8c00 { + label = "softdevice"; + reg = <0x000d8c00 DT_SIZE_K(144)>; + }; + }; +}; + +&cpuapp_sram { + status = "okay"; + + partitions { + #address-cells = <1>; + #size-cells = <1>; + + softdevice_static_ram: partition@20000080 { + label = "softdevice_static_ram"; + reg = <0x20000080 0x1780>; + }; + + softdevice_dynamic_ram: partition@20001800 { + label = "softdevice_dynamic_ram"; + reg = <0x20001800 DT_SIZE_K(12)>; + }; + + app_ram: partition@20004800 { + label = "app_ram"; + reg = <0x20004800 DT_SIZE_K(173)>; + }; + }; +}; diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice.yaml b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice.yaml new file mode 100644 index 0000000000..feef530cec --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice.yaml @@ -0,0 +1,17 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +identifier: bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice +name: Bare_Metal-nRF54L15-DK-nRF54L10-Application-S145-SoftDevice +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 173 +flash: 859 diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_defconfig b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_defconfig new file mode 100644 index 0000000000..c2087ec652 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_defconfig @@ -0,0 +1,108 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +# Enable console +CONFIG_CONSOLE=y +CONFIG_BM_UARTE_CONSOLE=y + +# Remove boot banner +CONFIG_NCS_BOOT_BANNER=n +CONFIG_BOOT_BANNER=n + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y + +# Disable partition manager +CONFIG_PARTITION_MANAGER_ENABLED=n + +# Disable multithreading +CONFIG_MULTITHREADING=n +CONFIG_ZERO_LATENCY_IRQS=y + +# Allow FLASH writes +CONFIG_MPU_ALLOW_FLASH_WRITE=y + +# Shrink +CONFIG_GPIO=n +CONFIG_NRF_SECURITY=n + +# Enable all NRFX drivers +CONFIG_NRFX_CLOCK=y +CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED=y +CONFIG_NRFX_COMP=y +CONFIG_NRFX_DPPI00=y +CONFIG_NRFX_DPPI10=y +CONFIG_NRFX_DPPI20=y +CONFIG_NRFX_DPPI30=y +CONFIG_NRFX_EGU10=y +CONFIG_NRFX_EGU20=y +CONFIG_NRFX_GPIOTE20=y +CONFIG_NRFX_GPIOTE30=y +CONFIG_NRFX_GPPI=y +CONFIG_NRFX_GRTC=y +CONFIG_NRFX_I2S20=y +CONFIG_NRFX_NFCT=y +CONFIG_NRFX_PDM20=y +CONFIG_NRFX_PDM21=y +CONFIG_NRFX_POWER=y +CONFIG_NRFX_PPIB00=y +CONFIG_NRFX_PPIB01=y +CONFIG_NRFX_PPIB10=y +CONFIG_NRFX_PPIB11=y +CONFIG_NRFX_PPIB20=y +CONFIG_NRFX_PPIB21=y +CONFIG_NRFX_PPIB22=y +CONFIG_NRFX_PPIB30=y +CONFIG_NRFX_PWM20=y +CONFIG_NRFX_PWM21=y +CONFIG_NRFX_PWM22=y +CONFIG_NRFX_QDEC20=y +CONFIG_NRFX_QDEC21=y +CONFIG_NRFX_RRAMC=y +CONFIG_NRFX_SAADC=y +CONFIG_NRFX_SPIM00=y +CONFIG_NRFX_SPIM20=y +CONFIG_NRFX_SPIM21=y +CONFIG_NRFX_SPIM22=y +CONFIG_NRFX_SPIM30=y +CONFIG_NRFX_SYSTICK=y +CONFIG_NRFX_TEMP=y +CONFIG_NRFX_TIMER00=y +CONFIG_NRFX_TIMER10=y +CONFIG_NRFX_TIMER20=y +CONFIG_NRFX_TIMER21=y +CONFIG_NRFX_TIMER22=y +CONFIG_NRFX_TIMER23=y +CONFIG_NRFX_TIMER24=y +CONFIG_NRFX_TWIM20=y +CONFIG_NRFX_TWIM21=y +CONFIG_NRFX_TWIM22=y +CONFIG_NRFX_TWIM30=y +CONFIG_NRFX_UARTE00=y +CONFIG_NRFX_UARTE20=y +CONFIG_NRFX_UARTE21=y +CONFIG_NRFX_UARTE22=y +CONFIG_NRFX_UARTE30=y +CONFIG_NRFX_WDT31=y +CONFIG_NRFX_PRS_BOX_0=y +CONFIG_NRFX_PRS_BOX_1=y +CONFIG_NRFX_PRS_BOX_2=y +CONFIG_NRFX_PRS_BOX_3=y +CONFIG_NRFX_PRS_BOX_4=y diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_mcuboot.dts b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_mcuboot.dts new file mode 100644 index 0000000000..cbc8e239cc --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_mcuboot.dts @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +/dts-v1/; + +#include +#include "bm_nrf54l15dk_nrf54l10_cpuapp_common.dtsi" + +/ { + sram@2002FC00 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0x2002FC00 DT_SIZE_K(1)>; + zephyr,memory-region = "RetainedMem"; + status = "okay"; + + retainedmem { + compatible = "zephyr,retained-ram"; + status = "okay"; + #address-cells = <1>; + #size-cells = <1>; + + settings_partition0: settings_partition@0 { + compatible = "zephyr,retention"; + status = "okay"; + reg = <0x0 DT_SIZE_K(1)>; + }; + }; + }; + + chosen { + zephyr,flash = &cpuapp_rram; + zephyr,code-partition = &slot0_partition; + zephyr,sram = &app_ram; + zephyr,settings-partition = &settings_partition0; + }; +}; + +&cpuapp_rram { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "boot"; + reg = <0x00000000 DT_SIZE_K(36)>; + }; + + storage_partition: partition@9000 { + compatible = "fixed-subpartitions"; + label = "storage"; + reg = <0x00009000 DT_SIZE_K(8)>; + ranges = <0x0 0x9000 DT_SIZE_K(8)>; + #address-cells = <1>; + #size-cells = <1>; + + peer_manager_partition: partition@0 { + label = "peer_manager"; + reg = <0x00000000 DT_SIZE_K(4)>; + }; + + storage0_partition: partition@1000 { + label = "storage0"; + reg = <0x00001000 DT_SIZE_K(4)>; + }; + }; + + slot0_partition: partition@b000 { + label = "slot0"; + reg = <0x0000b000 DT_SIZE_K(756)>; + }; + + slot1_partition: partition@c8000 { + label = "slot1"; + reg = <0x000c8000 DT_SIZE_K(64)>; + }; + + /* 1 kB free space due to slot1_partition partition 2k alignment. */ + + softdevice_partition: partition@d8400 { + label = "softdevice"; + reg = <0x000d8400 (DT_SIZE_K(146) + 0x200)>; + }; + + metadata_partition: partition@fce00 { + label = "metadata"; + reg = <0x000fce00 0x200>; + }; + }; +}; + +&cpuapp_sram { + status = "okay"; + + partitions { + #address-cells = <1>; + #size-cells = <1>; + + softdevice_static_ram: partition@20000080 { + label = "softdevice_static_ram"; + reg = <0x20000080 0x1780>; + }; + + softdevice_dynamic_ram: partition@20001800 { + label = "softdevice_dynamic_ram"; + reg = <0x20001800 DT_SIZE_K(12)>; + }; + + app_ram: partition@20004800 { + label = "app_ram"; + reg = <0x20004800 DT_SIZE_K(173)>; + }; + }; +}; diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_mcuboot.yaml b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_mcuboot.yaml new file mode 100644 index 0000000000..e5541d148a --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_mcuboot.yaml @@ -0,0 +1,17 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +identifier: bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice/mcuboot +name: Bare_Metal-nRF54L15-DK-nRF54L10-Application-S145-SoftDevice-MCUboot +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 173 +flash: 756 diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_mcuboot_defconfig b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_mcuboot_defconfig new file mode 100644 index 0000000000..c2087ec652 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l10_cpuapp_s145_softdevice_mcuboot_defconfig @@ -0,0 +1,108 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +# Enable console +CONFIG_CONSOLE=y +CONFIG_BM_UARTE_CONSOLE=y + +# Remove boot banner +CONFIG_NCS_BOOT_BANNER=n +CONFIG_BOOT_BANNER=n + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y + +# Disable partition manager +CONFIG_PARTITION_MANAGER_ENABLED=n + +# Disable multithreading +CONFIG_MULTITHREADING=n +CONFIG_ZERO_LATENCY_IRQS=y + +# Allow FLASH writes +CONFIG_MPU_ALLOW_FLASH_WRITE=y + +# Shrink +CONFIG_GPIO=n +CONFIG_NRF_SECURITY=n + +# Enable all NRFX drivers +CONFIG_NRFX_CLOCK=y +CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED=y +CONFIG_NRFX_COMP=y +CONFIG_NRFX_DPPI00=y +CONFIG_NRFX_DPPI10=y +CONFIG_NRFX_DPPI20=y +CONFIG_NRFX_DPPI30=y +CONFIG_NRFX_EGU10=y +CONFIG_NRFX_EGU20=y +CONFIG_NRFX_GPIOTE20=y +CONFIG_NRFX_GPIOTE30=y +CONFIG_NRFX_GPPI=y +CONFIG_NRFX_GRTC=y +CONFIG_NRFX_I2S20=y +CONFIG_NRFX_NFCT=y +CONFIG_NRFX_PDM20=y +CONFIG_NRFX_PDM21=y +CONFIG_NRFX_POWER=y +CONFIG_NRFX_PPIB00=y +CONFIG_NRFX_PPIB01=y +CONFIG_NRFX_PPIB10=y +CONFIG_NRFX_PPIB11=y +CONFIG_NRFX_PPIB20=y +CONFIG_NRFX_PPIB21=y +CONFIG_NRFX_PPIB22=y +CONFIG_NRFX_PPIB30=y +CONFIG_NRFX_PWM20=y +CONFIG_NRFX_PWM21=y +CONFIG_NRFX_PWM22=y +CONFIG_NRFX_QDEC20=y +CONFIG_NRFX_QDEC21=y +CONFIG_NRFX_RRAMC=y +CONFIG_NRFX_SAADC=y +CONFIG_NRFX_SPIM00=y +CONFIG_NRFX_SPIM20=y +CONFIG_NRFX_SPIM21=y +CONFIG_NRFX_SPIM22=y +CONFIG_NRFX_SPIM30=y +CONFIG_NRFX_SYSTICK=y +CONFIG_NRFX_TEMP=y +CONFIG_NRFX_TIMER00=y +CONFIG_NRFX_TIMER10=y +CONFIG_NRFX_TIMER20=y +CONFIG_NRFX_TIMER21=y +CONFIG_NRFX_TIMER22=y +CONFIG_NRFX_TIMER23=y +CONFIG_NRFX_TIMER24=y +CONFIG_NRFX_TWIM20=y +CONFIG_NRFX_TWIM21=y +CONFIG_NRFX_TWIM22=y +CONFIG_NRFX_TWIM30=y +CONFIG_NRFX_UARTE00=y +CONFIG_NRFX_UARTE20=y +CONFIG_NRFX_UARTE21=y +CONFIG_NRFX_UARTE22=y +CONFIG_NRFX_UARTE30=y +CONFIG_NRFX_WDT31=y +CONFIG_NRFX_PRS_BOX_0=y +CONFIG_NRFX_PRS_BOX_1=y +CONFIG_NRFX_PRS_BOX_2=y +CONFIG_NRFX_PRS_BOX_3=y +CONFIG_NRFX_PRS_BOX_4=y diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice.dts b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice.dts new file mode 100644 index 0000000000..48ef6b4ae4 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice.dts @@ -0,0 +1,81 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +/dts-v1/; + +#include +#include "bm_nrf54l15dk_nrf54l15_cpuapp_common.dtsi" + +/ { + chosen { + zephyr,flash = &cpuapp_rram; + zephyr,code-partition = &slot0_partition; + zephyr,sram = &app_ram; + }; +}; + +&cpuapp_rram { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + slot0_partition: partition@0 { + label = "slot0"; + reg = <0x00000000 DT_SIZE_K(1371)>; + }; + + storage_partition: partition@156c00 { + compatible = "fixed-subpartitions"; + label = "storage"; + reg = <0x00156c00 DT_SIZE_K(8)>; + ranges = <0x0 0x156c00 DT_SIZE_K(8)>; + #address-cells = <1>; + #size-cells = <1>; + + peer_manager_partition: partition@0 { + label = "peer_manager"; + reg = <0x00000000 DT_SIZE_K(4)>; + }; + + storage0_partition: partition@1000 { + label = "storage0"; + reg = <0x00001000 DT_SIZE_K(4)>; + }; + }; + + softdevice_partition: partition@158c00 { + label = "softdevice"; + reg = <0x00158c00 DT_SIZE_K(144)>; + }; + }; +}; + +&cpuapp_sram { + status = "okay"; + + partitions { + #address-cells = <1>; + #size-cells = <1>; + + softdevice_static_ram: partition@20000080 { + label = "softdevice_static_ram"; + reg = <0x20000080 0x1780>; + }; + + softdevice_dynamic_ram: partition@20001800 { + label = "softdevice_dynamic_ram"; + reg = <0x20001800 DT_SIZE_K(12)>; + }; + + app_ram: partition@20004800 { + label = "app_ram"; + reg = <0x20004800 DT_SIZE_K(237)>; + }; + }; +}; diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice.yaml b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice.yaml new file mode 100644 index 0000000000..21963c7567 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice.yaml @@ -0,0 +1,17 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +identifier: bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice +name: Bare_Metal-nRF54L15-DK-nRF54L15-Application-S145-SoftDevice +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 237 +flash: 1371 diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_defconfig b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_defconfig new file mode 100644 index 0000000000..c2087ec652 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_defconfig @@ -0,0 +1,108 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +# Enable console +CONFIG_CONSOLE=y +CONFIG_BM_UARTE_CONSOLE=y + +# Remove boot banner +CONFIG_NCS_BOOT_BANNER=n +CONFIG_BOOT_BANNER=n + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y + +# Disable partition manager +CONFIG_PARTITION_MANAGER_ENABLED=n + +# Disable multithreading +CONFIG_MULTITHREADING=n +CONFIG_ZERO_LATENCY_IRQS=y + +# Allow FLASH writes +CONFIG_MPU_ALLOW_FLASH_WRITE=y + +# Shrink +CONFIG_GPIO=n +CONFIG_NRF_SECURITY=n + +# Enable all NRFX drivers +CONFIG_NRFX_CLOCK=y +CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED=y +CONFIG_NRFX_COMP=y +CONFIG_NRFX_DPPI00=y +CONFIG_NRFX_DPPI10=y +CONFIG_NRFX_DPPI20=y +CONFIG_NRFX_DPPI30=y +CONFIG_NRFX_EGU10=y +CONFIG_NRFX_EGU20=y +CONFIG_NRFX_GPIOTE20=y +CONFIG_NRFX_GPIOTE30=y +CONFIG_NRFX_GPPI=y +CONFIG_NRFX_GRTC=y +CONFIG_NRFX_I2S20=y +CONFIG_NRFX_NFCT=y +CONFIG_NRFX_PDM20=y +CONFIG_NRFX_PDM21=y +CONFIG_NRFX_POWER=y +CONFIG_NRFX_PPIB00=y +CONFIG_NRFX_PPIB01=y +CONFIG_NRFX_PPIB10=y +CONFIG_NRFX_PPIB11=y +CONFIG_NRFX_PPIB20=y +CONFIG_NRFX_PPIB21=y +CONFIG_NRFX_PPIB22=y +CONFIG_NRFX_PPIB30=y +CONFIG_NRFX_PWM20=y +CONFIG_NRFX_PWM21=y +CONFIG_NRFX_PWM22=y +CONFIG_NRFX_QDEC20=y +CONFIG_NRFX_QDEC21=y +CONFIG_NRFX_RRAMC=y +CONFIG_NRFX_SAADC=y +CONFIG_NRFX_SPIM00=y +CONFIG_NRFX_SPIM20=y +CONFIG_NRFX_SPIM21=y +CONFIG_NRFX_SPIM22=y +CONFIG_NRFX_SPIM30=y +CONFIG_NRFX_SYSTICK=y +CONFIG_NRFX_TEMP=y +CONFIG_NRFX_TIMER00=y +CONFIG_NRFX_TIMER10=y +CONFIG_NRFX_TIMER20=y +CONFIG_NRFX_TIMER21=y +CONFIG_NRFX_TIMER22=y +CONFIG_NRFX_TIMER23=y +CONFIG_NRFX_TIMER24=y +CONFIG_NRFX_TWIM20=y +CONFIG_NRFX_TWIM21=y +CONFIG_NRFX_TWIM22=y +CONFIG_NRFX_TWIM30=y +CONFIG_NRFX_UARTE00=y +CONFIG_NRFX_UARTE20=y +CONFIG_NRFX_UARTE21=y +CONFIG_NRFX_UARTE22=y +CONFIG_NRFX_UARTE30=y +CONFIG_NRFX_WDT31=y +CONFIG_NRFX_PRS_BOX_0=y +CONFIG_NRFX_PRS_BOX_1=y +CONFIG_NRFX_PRS_BOX_2=y +CONFIG_NRFX_PRS_BOX_3=y +CONFIG_NRFX_PRS_BOX_4=y diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_mcuboot.dts b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_mcuboot.dts new file mode 100644 index 0000000000..950bd5dab1 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_mcuboot.dts @@ -0,0 +1,119 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +/dts-v1/; + +#include +#include "bm_nrf54l15dk_nrf54l15_cpuapp_common.dtsi" + +/ { + sram@2003FC00 { + compatible = "zephyr,memory-region", "mmio-sram"; + reg = <0x2003FC00 DT_SIZE_K(1)>; + zephyr,memory-region = "RetainedMem"; + status = "okay"; + + retainedmem { + compatible = "zephyr,retained-ram"; + status = "okay"; + #address-cells = <1>; + #size-cells = <1>; + + settings_partition0: settings_partition@0 { + compatible = "zephyr,retention"; + status = "okay"; + reg = <0x0 DT_SIZE_K(1)>; + }; + }; + }; + + chosen { + zephyr,flash = &cpuapp_rram; + zephyr,code-partition = &slot0_partition; + zephyr,sram = &app_ram; + zephyr,settings-partition = &settings_partition0; + }; +}; + +&cpuapp_rram { + status = "okay"; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + boot_partition: partition@0 { + label = "boot"; + reg = <0x00000000 DT_SIZE_K(36)>; + }; + + storage_partition: partition@9000 { + compatible = "fixed-subpartitions"; + label = "storage"; + reg = <0x00009000 DT_SIZE_K(8)>; + ranges = <0x0 0x9000 DT_SIZE_K(8)>; + #address-cells = <1>; + #size-cells = <1>; + + peer_manager_partition: partition@0 { + label = "peer_manager"; + reg = <0x00000000 DT_SIZE_K(4)>; + }; + + storage0_partition: partition@1000 { + label = "storage0"; + reg = <0x00001000 DT_SIZE_K(4)>; + }; + }; + + slot0_partition: partition@b000 { + label = "slot0"; + reg = <0x0000b000 DT_SIZE_K(1268)>; + }; + + slot1_partition: partition@148000 { + label = "slot1"; + reg = <0x00148000 DT_SIZE_K(64)>; + }; + + /* 1 kB free space due to slot1_partition partition 2k alignment. */ + + softdevice_partition: partition@158400 { + label = "softdevice"; + reg = <0x00158400 (DT_SIZE_K(146) + 0x200)>; + }; + + metadata_partition: partition@17ce00 { + label = "metadata"; + reg = <0x0017ce00 0x200>; + }; + }; +}; + +&cpuapp_sram { + status = "okay"; + + partitions { + #address-cells = <1>; + #size-cells = <1>; + + softdevice_static_ram: partition@20000080 { + label = "softdevice_static_ram"; + reg = <0x20000080 0x1780>; + }; + + softdevice_dynamic_ram: partition@20001800 { + label = "softdevice_dynamic_ram"; + reg = <0x20001800 DT_SIZE_K(12)>; + }; + + app_ram: partition@20004800 { + label = "app_ram"; + reg = <0x20004800 DT_SIZE_K(237)>; + }; + }; +}; diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_mcuboot.yaml b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_mcuboot.yaml new file mode 100644 index 0000000000..8e8009fbed --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_mcuboot.yaml @@ -0,0 +1,17 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +identifier: bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice/mcuboot +name: Bare_Metal-nRF54L15-DK-nRF54L15-Application-S145-SoftDevice-MCUboot +type: mcu +arch: arm +toolchain: + - gnuarmemb + - xtools + - zephyr +sysbuild: true +ram: 237 +flash: 1268 diff --git a/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_mcuboot_defconfig b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_mcuboot_defconfig new file mode 100644 index 0000000000..c2087ec652 --- /dev/null +++ b/boards/nordic/bm_nrf54l15dk/bm_nrf54l15dk_nrf54l15_cpuapp_s145_softdevice_mcuboot_defconfig @@ -0,0 +1,108 @@ +# +# Copyright (c) 2025 Nordic Semiconductor +# +# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +# + +# Enable console +CONFIG_CONSOLE=y +CONFIG_BM_UARTE_CONSOLE=y + +# Remove boot banner +CONFIG_NCS_BOOT_BANNER=n +CONFIG_BOOT_BANNER=n + +# Enable MPU +CONFIG_ARM_MPU=y + +# Enable hardware stack protection +CONFIG_HW_STACK_PROTECTION=y + +# MPU-based null-pointer dereferencing detection cannot +# be applied as the (0x0 - 0x400) is unmapped for this target. +CONFIG_NULL_POINTER_EXCEPTION_DETECTION_NONE=y + +# Enable Cache +CONFIG_CACHE_MANAGEMENT=y +CONFIG_EXTERNAL_CACHE=y + +# Start SYSCOUNTER on driver init +CONFIG_NRF_GRTC_START_SYSCOUNTER=y + +# Disable partition manager +CONFIG_PARTITION_MANAGER_ENABLED=n + +# Disable multithreading +CONFIG_MULTITHREADING=n +CONFIG_ZERO_LATENCY_IRQS=y + +# Allow FLASH writes +CONFIG_MPU_ALLOW_FLASH_WRITE=y + +# Shrink +CONFIG_GPIO=n +CONFIG_NRF_SECURITY=n + +# Enable all NRFX drivers +CONFIG_NRFX_CLOCK=y +CONFIG_NRFX_CLOCK_LFXO_TWO_STAGE_ENABLED=y +CONFIG_NRFX_COMP=y +CONFIG_NRFX_DPPI00=y +CONFIG_NRFX_DPPI10=y +CONFIG_NRFX_DPPI20=y +CONFIG_NRFX_DPPI30=y +CONFIG_NRFX_EGU10=y +CONFIG_NRFX_EGU20=y +CONFIG_NRFX_GPIOTE20=y +CONFIG_NRFX_GPIOTE30=y +CONFIG_NRFX_GPPI=y +CONFIG_NRFX_GRTC=y +CONFIG_NRFX_I2S20=y +CONFIG_NRFX_NFCT=y +CONFIG_NRFX_PDM20=y +CONFIG_NRFX_PDM21=y +CONFIG_NRFX_POWER=y +CONFIG_NRFX_PPIB00=y +CONFIG_NRFX_PPIB01=y +CONFIG_NRFX_PPIB10=y +CONFIG_NRFX_PPIB11=y +CONFIG_NRFX_PPIB20=y +CONFIG_NRFX_PPIB21=y +CONFIG_NRFX_PPIB22=y +CONFIG_NRFX_PPIB30=y +CONFIG_NRFX_PWM20=y +CONFIG_NRFX_PWM21=y +CONFIG_NRFX_PWM22=y +CONFIG_NRFX_QDEC20=y +CONFIG_NRFX_QDEC21=y +CONFIG_NRFX_RRAMC=y +CONFIG_NRFX_SAADC=y +CONFIG_NRFX_SPIM00=y +CONFIG_NRFX_SPIM20=y +CONFIG_NRFX_SPIM21=y +CONFIG_NRFX_SPIM22=y +CONFIG_NRFX_SPIM30=y +CONFIG_NRFX_SYSTICK=y +CONFIG_NRFX_TEMP=y +CONFIG_NRFX_TIMER00=y +CONFIG_NRFX_TIMER10=y +CONFIG_NRFX_TIMER20=y +CONFIG_NRFX_TIMER21=y +CONFIG_NRFX_TIMER22=y +CONFIG_NRFX_TIMER23=y +CONFIG_NRFX_TIMER24=y +CONFIG_NRFX_TWIM20=y +CONFIG_NRFX_TWIM21=y +CONFIG_NRFX_TWIM22=y +CONFIG_NRFX_TWIM30=y +CONFIG_NRFX_UARTE00=y +CONFIG_NRFX_UARTE20=y +CONFIG_NRFX_UARTE21=y +CONFIG_NRFX_UARTE22=y +CONFIG_NRFX_UARTE30=y +CONFIG_NRFX_WDT31=y +CONFIG_NRFX_PRS_BOX_0=y +CONFIG_NRFX_PRS_BOX_1=y +CONFIG_NRFX_PRS_BOX_2=y +CONFIG_NRFX_PRS_BOX_3=y +CONFIG_NRFX_PRS_BOX_4=y diff --git a/boards/nordic/bm_nrf54l15dk/board.yml b/boards/nordic/bm_nrf54l15dk/board.yml index fe6e7d9a43..f186050ddc 100644 --- a/boards/nordic/bm_nrf54l15dk/board.yml +++ b/boards/nordic/bm_nrf54l15dk/board.yml @@ -9,18 +9,30 @@ board: cpucluster: cpuapp variants: - name: mcuboot + - name: s145_softdevice + cpucluster: cpuapp + variants: + - name: mcuboot - name: nrf54l10 variants: - name: s115_softdevice cpucluster: cpuapp variants: - name: mcuboot + - name: s145_softdevice + cpucluster: cpuapp + variants: + - name: mcuboot - name: nrf54l15 variants: - name: s115_softdevice cpucluster: cpuapp variants: - name: mcuboot + - name: s145_softdevice + cpucluster: cpuapp + variants: + - name: mcuboot runners: run_once: '--recover': @@ -33,14 +45,20 @@ runners: - bm_nrf54l15dk/nrf54l05/cpuapp - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot - boards: - bm_nrf54l15dk/nrf54l10/cpuapp - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice/mcuboot - boards: - bm_nrf54l15dk/nrf54l15/cpuapp - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice/mcuboot '--erase': - runners: - nrfjprog @@ -52,14 +70,20 @@ runners: - bm_nrf54l15dk/nrf54l05/cpuapp - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot - boards: - bm_nrf54l15dk/nrf54l10/cpuapp - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice/mcuboot - boards: - bm_nrf54l15dk/nrf54l15/cpuapp - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice/mcuboot '--reset': - runners: - nrfjprog @@ -71,11 +95,17 @@ runners: - bm_nrf54l15dk/nrf54l05/cpuapp - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot - boards: - bm_nrf54l15dk/nrf54l10/cpuapp - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice/mcuboot - boards: - bm_nrf54l15dk/nrf54l15/cpuapp - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice/mcuboot diff --git a/doc/nrf-bm/release_notes/release_notes_changelog.rst b/doc/nrf-bm/release_notes/release_notes_changelog.rst index a7dc3187e1..e8e081028b 100644 --- a/doc/nrf-bm/release_notes/release_notes_changelog.rst +++ b/doc/nrf-bm/release_notes/release_notes_changelog.rst @@ -24,6 +24,11 @@ S115 SoftDevice No changes since the latest nRF Connect SDK Bare Metal release. +S145 SoftDevice +=============== + +No changes since the latest nRF Connect SDK Bare Metal release. + SoftDevice Handler ================== @@ -32,7 +37,7 @@ No changes since the latest nRF Connect SDK Bare Metal release. Boards ====== -No changes since the latest nRF Connect SDK Bare Metal release. +* Added nrf54l15DK board variants for the S145 SoftDevice. DFU === diff --git a/samples/bluetooth/ble_nus/sample.yaml b/samples/bluetooth/ble_nus/sample.yaml index b9129f2f58..4c8fee679c 100644 --- a/samples/bluetooth/ble_nus/sample.yaml +++ b/samples/bluetooth/ble_nus/sample.yaml @@ -7,6 +7,9 @@ tests: - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice platform_allow: - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice @@ -14,6 +17,12 @@ tests: - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice/mcuboot - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice/mcuboot tags: ci_build sample.ble_nus.lpuarte: build_only: true @@ -21,6 +30,9 @@ tests: - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice platform_allow: - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice @@ -28,5 +40,11 @@ tests: - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice/mcuboot - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice/mcuboot extra_args: EXTRA_CONF_FILE="lpuarte.conf" tags: ci_build diff --git a/samples/bluetooth/hello_softdevice/sample.yaml b/samples/bluetooth/hello_softdevice/sample.yaml index d44d869d11..6377a86736 100644 --- a/samples/bluetooth/hello_softdevice/sample.yaml +++ b/samples/bluetooth/hello_softdevice/sample.yaml @@ -11,6 +11,12 @@ tests: - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice/mcuboot - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice/mcuboot platform_allow: - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice @@ -18,4 +24,10 @@ tests: - bm_nrf54l15dk/nrf54l05/cpuapp/s115_softdevice/mcuboot - bm_nrf54l15dk/nrf54l10/cpuapp/s115_softdevice/mcuboot - bm_nrf54l15dk/nrf54l15/cpuapp/s115_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice + - bm_nrf54l15dk/nrf54l05/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l10/cpuapp/s145_softdevice/mcuboot + - bm_nrf54l15dk/nrf54l15/cpuapp/s145_softdevice/mcuboot tags: ci_build diff --git a/samples/mcumgr/ble_mcumgr/socs/nrf54l05_cpuapp_s145_softdevice_mcuboot.conf b/samples/mcumgr/ble_mcumgr/socs/nrf54l05_cpuapp_s145_softdevice_mcuboot.conf new file mode 100644 index 0000000000..edb790a441 --- /dev/null +++ b/samples/mcumgr/ble_mcumgr/socs/nrf54l05_cpuapp_s145_softdevice_mcuboot.conf @@ -0,0 +1,4 @@ +CONFIG_NRF_SDH_BLE_GATT_MAX_MTU_SIZE=498 +CONFIG_BLE_CONN_PARAMS_MAX_CONN_INTERVAL=24 +CONFIG_BLE_CONN_PARAMS_SUP_TIMEOUT=20 +CONFIG_BLE_CONN_PARAMS_MAX_SUP_TIMEOUT_DEVIATION=20 diff --git a/samples/mcumgr/ble_mcumgr/socs/nrf54l10_cpuapp_s145_softdevice_mcuboot.conf b/samples/mcumgr/ble_mcumgr/socs/nrf54l10_cpuapp_s145_softdevice_mcuboot.conf new file mode 100644 index 0000000000..edb790a441 --- /dev/null +++ b/samples/mcumgr/ble_mcumgr/socs/nrf54l10_cpuapp_s145_softdevice_mcuboot.conf @@ -0,0 +1,4 @@ +CONFIG_NRF_SDH_BLE_GATT_MAX_MTU_SIZE=498 +CONFIG_BLE_CONN_PARAMS_MAX_CONN_INTERVAL=24 +CONFIG_BLE_CONN_PARAMS_SUP_TIMEOUT=20 +CONFIG_BLE_CONN_PARAMS_MAX_SUP_TIMEOUT_DEVIATION=20 diff --git a/samples/mcumgr/ble_mcumgr/socs/nrf54l15_cpuapp_s145_softdevice_mcuboot.conf b/samples/mcumgr/ble_mcumgr/socs/nrf54l15_cpuapp_s145_softdevice_mcuboot.conf new file mode 100644 index 0000000000..edb790a441 --- /dev/null +++ b/samples/mcumgr/ble_mcumgr/socs/nrf54l15_cpuapp_s145_softdevice_mcuboot.conf @@ -0,0 +1,4 @@ +CONFIG_NRF_SDH_BLE_GATT_MAX_MTU_SIZE=498 +CONFIG_BLE_CONN_PARAMS_MAX_CONN_INTERVAL=24 +CONFIG_BLE_CONN_PARAMS_SUP_TIMEOUT=20 +CONFIG_BLE_CONN_PARAMS_MAX_SUP_TIMEOUT_DEVIATION=20 diff --git a/subsys/softdevice/CMakeLists.txt b/subsys/softdevice/CMakeLists.txt index 44164fefb9..187a8c0fa3 100644 --- a/subsys/softdevice/CMakeLists.txt +++ b/subsys/softdevice/CMakeLists.txt @@ -4,6 +4,6 @@ # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause # -if(CONFIG_SOFTDEVICE_S115) +if(CONFIG_SOFTDEVICE_S115 OR CONFIG_SOFTDEVICE_S145) zephyr_include_directories("${ZEPHYR_NRF_BM_MODULE_DIR}/components/softdevice/${CONFIG_SOFTDEVICE_VARIANT_STR}/${CONFIG_SOFTDEVICE_VARIANT_STR}_API/include") endif() diff --git a/subsys/softdevice/Kconfig b/subsys/softdevice/Kconfig index a7e4d329ac..00a3b84824 100644 --- a/subsys/softdevice/Kconfig +++ b/subsys/softdevice/Kconfig @@ -28,11 +28,18 @@ config SOFTDEVICE_S115 depends on SOC_SERIES_NRF54LX select SOFTDEVICE_PERIPHERAL select SOFTDEVICE_DATA_LENGTH_UPDATE - default y + +config SOFTDEVICE_S145 + bool "s145 SoftDevice" + depends on SOC_SERIES_NRF54LX + select SOFTDEVICE_PERIPHERAL + select SOFTDEVICE_CENTRAL + select SOFTDEVICE_DATA_LENGTH_UPDATE config SOFTDEVICE_VARIANT_STR string default "s115" if SOFTDEVICE_S115 + default "s145" if SOFTDEVICE_S145 endif diff --git a/subsys/softdevice_handler/CMakeLists.txt b/subsys/softdevice_handler/CMakeLists.txt index 5fc6b858a4..9aefee3546 100644 --- a/subsys/softdevice_handler/CMakeLists.txt +++ b/subsys/softdevice_handler/CMakeLists.txt @@ -11,7 +11,7 @@ zephyr_library_sources( irq_connect.c ) -if(CONFIG_SOFTDEVICE_S115) +if(CONFIG_SOFTDEVICE_S115 OR CONFIG_SOFTDEVICE_S145) zephyr_library_sources(irq_forward.s) # Suppress the swap_helper.S file so that z_arm_svc can be defined manually set(cortex_m_dir ${ZEPHYR_BASE}/arch/arm/core/cortex_m) diff --git a/sysbuild/CMakeLists.txt b/sysbuild/CMakeLists.txt index 1b42019a97..53252c0556 100644 --- a/sysbuild/CMakeLists.txt +++ b/sysbuild/CMakeLists.txt @@ -172,7 +172,7 @@ function(${SYSBUILD_CURRENT_MODULE_NAME}_pre_cmake) set_config_bool(${SB_CONFIG_BM_FIRMWARE_LOADER_IMAGE_NAME} CONFIG_SOFTDEVICE n) endif() else() - foreach(option SOFTDEVICE_S115) + foreach(option SOFTDEVICE_S115 SOFTDEVICE_S145) if(SB_CONFIG_${option}) set_config_bool(${DEFAULT_IMAGE} CONFIG_${option} y) diff --git a/sysbuild/Kconfig.bm b/sysbuild/Kconfig.bm index a357c95d6e..02975f0f18 100644 --- a/sysbuild/Kconfig.bm +++ b/sysbuild/Kconfig.bm @@ -151,6 +151,10 @@ config SOFTDEVICE_S115 bool "S115" depends on SOC_SERIES_NRF54LX +config SOFTDEVICE_S145 + bool "S145" + depends on SOC_SERIES_NRF54LX + endchoice config SOFTDEVICE_FILE @@ -158,6 +162,9 @@ config SOFTDEVICE_FILE default "$(ZEPHYR_NRF_BM_MODULE_DIR)/components/softdevice/s115/s115_nrf54l05_9.0.0-4.prototype_softdevice.hex" if SOFTDEVICE_S115 && SOC_NRF54L05 default "$(ZEPHYR_NRF_BM_MODULE_DIR)/components/softdevice/s115/s115_nrf54l10_9.0.0-4.prototype_softdevice.hex" if SOFTDEVICE_S115 && SOC_NRF54L10 default "$(ZEPHYR_NRF_BM_MODULE_DIR)/components/softdevice/s115/s115_nrf54l15_9.0.0-4.prototype_softdevice.hex" if SOFTDEVICE_S115 && SOC_NRF54L15 + default "$(ZEPHYR_NRF_BM_MODULE_DIR)/components/softdevice/s145/s145_nrf54l05_9.0.0-4.prototype_softdevice.hex" if SOFTDEVICE_S145 && SOC_NRF54L05 + default "$(ZEPHYR_NRF_BM_MODULE_DIR)/components/softdevice/s145/s145_nrf54l10_9.0.0-4.prototype_softdevice.hex" if SOFTDEVICE_S145 && SOC_NRF54L10 + default "$(ZEPHYR_NRF_BM_MODULE_DIR)/components/softdevice/s145/s145_nrf54l15_9.0.0-4.prototype_softdevice.hex" if SOFTDEVICE_S145 && SOC_NRF54L15 help Specifies the path to the softdevice hex file. diff --git a/sysbuild/image_configurations/BOOTLOADER_image_default.cmake b/sysbuild/image_configurations/BOOTLOADER_image_default.cmake index f3188f91e4..8b6ba99c6b 100644 --- a/sysbuild/image_configurations/BOOTLOADER_image_default.cmake +++ b/sysbuild/image_configurations/BOOTLOADER_image_default.cmake @@ -38,7 +38,7 @@ set_config_string(${ZCMAKE_APPLICATION} CONFIG_BOOT_SIGNATURE_KEY_FILE "${SB_CON set_config_bool(${ZCMAKE_APPLICATION} CONFIG_BOOT_FIRMWARE_LOADER_NO_APPLICATION y) set_config_string(${ZCMAKE_APPLICATION} CONFIG_SOFTDEVICE_FILE "${SB_CONFIG_SOFTDEVICE_FILE}") -if(SB_CONFIG_SOFTDEVICE_S115) +if(SB_CONFIG_SOFTDEVICE_S115 OR SB_CONFIG_SOFTDEVICE_S145) set_config_bool(${ZCMAKE_APPLICATION} CONFIG_SOFTDEVICE_PAD_HEADER y) endif()