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samples: event_manager_proxy: Run sample on L15, LM20 and LV10
Add overlays required to run the event_manager_proxy on: - nRF54L15 DK, - nRF54LM20A PDK, - nRF54LV10A DK. Signed-off-by: Sebastian Głąb <[email protected]>
1 parent 6cb8263 commit 0539383

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‎samples/event_manager_proxy/Kconfig.sysbuild‎

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@@ -11,4 +11,7 @@ config REMOTE_BOARD
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default "nrf5340dk/nrf5340/cpunet" if BOARD_NRF5340DK_NRF5340_CPUAPP
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default "nrf5340dk/nrf5340/cpunet" if BOARD_NRF5340DK_NRF5340_CPUAPP_NS
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default "nrf54h20dk/nrf54h20/cpuppr" if BOARD_NRF54H20DK_NRF54H20_CPUAPP
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default "nrf54l15dk/nrf54l15/cpuflpr" if BOARD_NRF54L15DK_NRF54L15_CPUAPP
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default "nrf54lm20pdk/nrf54lm20a/cpuflpr" if BOARD_NRF54LM20PDK_NRF54LM20A_CPUAPP
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default "nrf54lv10dk/nrf54lv10a/cpuflpr" if BOARD_NRF54LV10DK_NRF54LV10A_CPUAPP
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default "UNKNOWN"

‎samples/event_manager_proxy/boards/nrf54l15dk_nrf54l15_cpuapp.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/ {
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chosen {
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/delete-property/ zephyr,bt-hci;
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};
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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sram_rx: memory@20018000 {
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reg = <0x20018000 0x8000>;
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};
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sram_tx: memory@20020000 {
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reg = <0x20020000 0x8000>;
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};
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};
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};
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ipc {
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ipc0: ipc0 {
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compatible = "zephyr,ipc-icmsg";
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dcache-alignment = <32>;
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tx-region = <&sram_tx>;
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rx-region = <&sram_rx>;
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mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>;
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mbox-names = "rx", "tx";
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status = "okay";
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};
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};
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};
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&cpuapp_vevif_rx {
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status = "okay";
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};
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&cpuapp_vevif_tx {
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status = "okay";
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};

‎samples/event_manager_proxy/boards/nrf54lm20pdk_nrf54lm20a_cpuapp.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/ {
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chosen {
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/delete-property/ zephyr,bt-hci;
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};
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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sram_rx: memory@20057c00 {
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reg = <0x20057c00 0x8000>;
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};
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sram_tx: memory@2005fc00 {
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reg = <0x2005fc00 0x8000>;
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};
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};
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};
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ipc {
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ipc0: ipc0 {
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compatible = "zephyr,ipc-icmsg";
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dcache-alignment = <32>;
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tx-region = <&sram_tx>;
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rx-region = <&sram_rx>;
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mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>;
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mbox-names = "rx", "tx";
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status = "okay";
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};
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};
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};
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&cpuapp_vevif_rx {
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status = "okay";
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};
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&cpuapp_vevif_tx {
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status = "okay";
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};

‎samples/event_manager_proxy/boards/nrf54lv10dk_nrf54lv10a_cpuapp.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/ {
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chosen {
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/delete-property/ zephyr,bt-hci;
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};
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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sram_rx: memory@2000fc00 {
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reg = <0x2000fc00 0x8000>;
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};
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sram_tx: memory@20017c00 {
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reg = <0x20017c00 0x8000>;
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};
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};
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};
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ipc {
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ipc0: ipc0 {
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compatible = "zephyr,ipc-icmsg";
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dcache-alignment = <32>;
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tx-region = <&sram_tx>;
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rx-region = <&sram_rx>;
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mboxes = <&cpuapp_vevif_rx 20>, <&cpuapp_vevif_tx 21>;
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mbox-names = "rx", "tx";
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status = "okay";
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};
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};
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};
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&cpuapp_vevif_rx {
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status = "okay";
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};
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&cpuapp_vevif_tx {
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status = "okay";
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};

‎samples/event_manager_proxy/remote/boards/nrf54l15dk_nrf54l15_cpuflpr.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/ {
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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sram_tx: memory@20018000 {
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reg = <0x20018000 0x8000>;
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};
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sram_rx: memory@20020000 {
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reg = <0x20020000 0x8000>;
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};
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};
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};
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ipc {
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ipc0: ipc0 {
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compatible = "zephyr,ipc-icmsg";
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dcache-alignment = <32>;
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tx-region = <&sram_tx>;
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rx-region = <&sram_rx>;
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mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>;
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mbox-names = "rx", "tx";
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status = "okay";
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};
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};
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};
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&cpuflpr_vevif_rx {
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status = "okay";
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};
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&cpuflpr_vevif_tx {
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status = "okay";
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};
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&uart30 {
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/delete-property/ hw-flow-control;
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};

‎samples/event_manager_proxy/remote/boards/nrf54lm20pdk_nrf54lm20a_cpuflpr.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/ {
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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sram_tx: memory@20057c00 {
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reg = <0x20057c00 0x8000>;
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};
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sram_rx: memory@2005fc00 {
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reg = <0x2005fc00 0x8000>;
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};
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};
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};
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ipc {
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ipc0: ipc0 {
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compatible = "zephyr,ipc-icmsg";
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dcache-alignment = <32>;
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tx-region = <&sram_tx>;
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rx-region = <&sram_rx>;
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mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>;
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mbox-names = "rx", "tx";
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status = "okay";
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};
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};
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};
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&cpuflpr_vevif_rx {
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status = "okay";
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};
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&cpuflpr_vevif_tx {
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status = "okay";
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};
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&uart30 {
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/delete-property/ hw-flow-control;
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};

‎samples/event_manager_proxy/remote/boards/nrf54lv10dk_nrf54lv10a_cpuflpr.conf‎

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#
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# Copyright (c) 2024 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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################################################################################
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CONFIG_LOG=y
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CONFIG_LOG_MODE_MINIMAL=y
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CONFIG_ASSERT=n
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CONFIG_LOG_BACKEND_UART=n
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CONFIG_BOOT_BANNER=n
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CONFIG_EARLY_CONSOLE=y
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CONFIG_HEAP_MEM_POOL_SIZE=1024
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CONFIG_SIZE_OPTIMIZATIONS=y

‎samples/event_manager_proxy/remote/boards/nrf54lv10dk_nrf54lv10a_cpuflpr.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/ {
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soc {
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reserved-memory {
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#address-cells = <1>;
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#size-cells = <1>;
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sram_tx: memory@2000fc00 {
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reg = <0x2000fc00 0x8000>;
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};
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sram_rx: memory@20017c00 {
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reg = <0x20017c00 0x8000>;
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};
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};
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};
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ipc {
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ipc0: ipc0 {
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compatible = "zephyr,ipc-icmsg";
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dcache-alignment = <32>;
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tx-region = <&sram_tx>;
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rx-region = <&sram_rx>;
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mboxes = <&cpuflpr_vevif_rx 21>, <&cpuflpr_vevif_tx 20>;
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mbox-names = "rx", "tx";
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status = "okay";
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};
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};
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};
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&cpuflpr_vevif_rx {
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status = "okay";
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};
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&cpuflpr_vevif_tx {
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status = "okay";
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};
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&uart20 {
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/delete-property/ hw-flow-control;
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};

‎samples/event_manager_proxy/sample.yaml‎

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integration_platforms:
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- nrf54h20dk/nrf54h20/cpuapp
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timeout: 20
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sample.event_manager_proxy.nrf54l_cpuapp_cpuflpr:
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extra_args:
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- event_manager_proxy_SNIPPET=nordic-flpr
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platform_allow:
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54lm20pdk/nrf54lm20a/cpuapp
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- [email protected]/nrf54lm20a/cpuapp
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- [email protected]/nrf54lm20a/cpuapp
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- [email protected]/nrf54lm20a/cpuapp
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- nrf54lv10dk/nrf54lv10a/cpuapp
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- [email protected]/nrf54lv10a/cpuapp
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- [email protected]/nrf54lv10a/cpuapp
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integration_platforms:
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54lm20pdk/nrf54lm20a/cpuapp
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- nrf54lv10dk/nrf54lv10a/cpuapp

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