@@ -115,6 +115,31 @@ static struct ipc_ept_cfg ep_cfg = {
115115 .cb = {.bound = ep_bound , .received = ep_recv },
116116};
117117
118+ const char * z_riscv_mcause_str (uint32_t cause )
119+ {
120+ static const char * const mcause_str [17 ] = {
121+ [0 ] = "Instruction address misaligned" ,
122+ [1 ] = "Instruction Access fault" ,
123+ [2 ] = "Illegal instruction" ,
124+ [3 ] = "Breakpoint" ,
125+ [4 ] = "Load address misaligned" ,
126+ [5 ] = "Load access fault" ,
127+ [6 ] = "Store/AMO address misaligned" ,
128+ [7 ] = "Store/AMO access fault" ,
129+ [8 ] = "Environment call from U-mode" ,
130+ [9 ] = "Environment call from S-mode" ,
131+ [10 ] = "Unknown" ,
132+ [11 ] = "Environment call from M-mode" ,
133+ [12 ] = "Instruction page fault" ,
134+ [13 ] = "Load page fault" ,
135+ [14 ] = "Unknown" ,
136+ [15 ] = "Store/AMO page fault" ,
137+ [16 ] = "Unknown" ,
138+ };
139+
140+ return mcause_str [MIN (cause , ARRAY_SIZE (mcause_str ) - 1 )];
141+ }
142+
118143/**
119144 * @brief IPC receive callback function.
120145 *
@@ -186,17 +211,18 @@ static void ep_recv(const void *data, size_t len, void *priv)
186211 }
187212 case NRFE_MSPI_SDP_APP_HARD_FAULT : {
188213
214+ const uint32_t mcause_exc_mask = 0xfff ;
189215 volatile uint32_t cause = cpuflpr_error_ctx_ptr [0 ];
190216 volatile uint32_t pc = cpuflpr_error_ctx_ptr [1 ];
191217 volatile uint32_t bad_addr = cpuflpr_error_ctx_ptr [2 ];
192218 volatile uint32_t * ctx = (volatile uint32_t * )cpuflpr_error_ctx_ptr [3 ];
193219
194- LOG_ERR (">>> SDP APP FATAL ERROR" );
220+ LOG_ERR (">>> HPF APP FATAL ERROR: %s" , z_riscv_mcause_str ( cause & mcause_exc_mask ) );
195221 LOG_ERR ("Faulting instruction address (mepc): 0x%08x" , pc );
196222 LOG_ERR ("mcause: 0x%08x, mtval: 0x%08x, ra: 0x%08x" , cause , bad_addr , ctx [0 ]);
197223 LOG_ERR (" t0: 0x%08x, t1: 0x%08x, t2: 0x%08x" , ctx [1 ], ctx [2 ], ctx [3 ]);
198224
199- LOG_ERR ("SDP application halted..." );
225+ LOG_ERR ("HPF application halted..." );
200226 break ;
201227 }
202228 default : {
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