sysbuild: Remove offsets from merged slots

Adjust logic, so the merged slots do not include gaps between images.

Ref: NCSDK-25612

Signed-off-by: Tomasz Chyrowicz <[email protected]>

Author: tomchy

applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/app_common.dtsi

@@ -65,17 +65,13 @@
 	};
 };
 
-/* Define the necessary aliases for the MCUboot slots that will be used by the DFU transports.
- * Due to the build system limitation, the allowed size of the application image (configured by
- * the code partition DTS node) is incorrectly increased by the size allocated for the radio image.
- */
-slot0_partition: &cpuapp_slot0_partition {
-	label = "image-0";
+/ {
+	chosen {
+		zephyr,code-partition = &cpuapp_slot0_partition;
+	};
 };
 
-slot1_partition: &cpuapp_slot1_partition {
-	label = "image-1";
-};
+secondary_app_partition: &cpuapp_slot1_partition {};
 
 /* Remove the undefined property value from the disabled VPR cores to prevent build errors. */
 &cpuflpr_vpr {

applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/images/mcuboot/app.overlay

@@ -15,17 +15,6 @@
 	};
 };
 
-/* Define the necessary aliases for the DTS partition nodes that contain the application and
- * radio images.
- */
-slot0_partition: &cpuapp_slot0_partition {
-	label = "image-0";
-};
-
-slot1_partition: &cpuapp_slot1_partition {
-	label = "image-1";
-};
-
 /* Remove the undefined property value from the disabled VPR cores to prevent build errors. */
 &cpuflpr_vpr {
 	/delete-property/ source-memory;

applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/memory_map.dtsi

@@ -21,30 +21,33 @@
 			reg = <0x30000 DT_SIZE_K(24)>;
 		};
 
-		/* Due to the build system limitation, the allowed size of the application image
-		 * (configured by the code partition DTS node) is incorrectly increased by the size
-		 * allocated for the radio image.
+		/* When using merged slots, the definition of MCUboot slots is common for all
+		 * images and points to the "merged" partition.
 		 */
-		cpuapp_slot0_partition: partition@36000 {
+		slot0_partition: partition@36000 {
 			reg = <0x36000 DT_SIZE_K(808)>;
 		};
 
+		cpuapp_slot0_partition: partition@36800 {
+			reg = <0x36800 DT_SIZE_K(586)>;
+		};
+
 		cpurad_slot0_partition: partition@c9000 {
-			reg = <0xc9000 DT_SIZE_K(220)>;
+			reg = <0xc9000 (DT_SIZE_K(220) - 224)>;
 		};
 
 		/* Partitions belonging to the MRAM_11 memory block. */
 
-		/* Due to the build system limitation, the allowed size of the application image
-		 * (configured by the code partition DTS node) is incorrectly increased by the size
-		 * allocated for the radio image.
-		 */
-		cpuapp_slot1_partition: partition@100000 {
+		slot1_partition: partition@100000 {
 			reg = <0x100000 DT_SIZE_K(808)>;
 		};
 
+		cpuapp_slot1_partition: partition@100800 {
+			reg = <0x100800 DT_SIZE_K(586)>;
+		};
+
 		cpurad_slot1_partition: partition@193000 {
-			reg = <0x193000 DT_SIZE_K(220)>;
+			reg = <0x193000 (DT_SIZE_K(220) - 224)>;
 		};
 
 		storage_partition: partition@1ca000 {

applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpurad/images/ipc_radio/app.overlay

@@ -6,10 +6,10 @@
 
 #include "../../../nrf54h20dk_nrf54h20_cpuapp/memory_map.dtsi"
 
-slot0_partition: &cpurad_slot0_partition {
-	label = "image-0";
+/ {
+	chosen {
+		zephyr,code-partition = &cpurad_slot0_partition;
+	};
 };
 
-slot1_partition: &cpurad_slot1_partition {
-	label = "image-1";
-};
+secondary_app_partition: &cpurad_slot1_partition {};

cmake/sysbuild/sign_nrf54h20.cmake

@@ -247,10 +247,14 @@ function(mcuboot_sign_merged_nrf54h20 merged_hex main_image)
      SB_CONFIG_MCUBOOT_MODE_DIRECT_XIP)
     if(CONFIG_NCS_IS_VARIANT_IMAGE)
       set(slot_size ${slot1_size})
+      set(slot_addr ${slot1_addr})
     else()
       set(slot_size ${slot0_size})
+      set(slot_addr ${slot0_addr})
     endif()
-    set(imgtool_rom_command --rom-fixed ${code_addr})
+    # Adjust start offset, based on the active slot and code partition address.
+    math(EXPR start_offset "${start_offset} + ${code_addr} - ${slot_addr}")
+    set(imgtool_rom_command --rom-fixed ${slot_addr})
   else()
     message(FATAL_ERROR "Only Direct XIP MCUboot modes are supported.")
     return()
@@ -259,7 +263,8 @@ function(mcuboot_sign_merged_nrf54h20 merged_hex main_image)
   # Basic 'imgtool sign' command with known image information.
   set(imgtool_sign ${PYTHON_EXECUTABLE} ${IMGTOOL} sign
       --version ${CONFIG_MCUBOOT_IMGTOOL_SIGN_VERSION} --header-size
-      ${start_offset} --slot-size ${slot_size} ${imgtool_rom_command})
+      ${start_offset} --slot-size ${slot_size} --pad-header
+      ${imgtool_rom_command})
   set(imgtool_args --align ${write_block_size} ${imgtool_args})
 
   # Extensionless prefix of any output file.
@@ -325,8 +330,8 @@ function(mcuboot_sign_merged_nrf54h20 merged_hex main_image)
         "${output}.signed.confirmed.hex" CACHE FILEPATH
         "Signed and confirmed kernel hex file" FORCE)
       list(APPEND imgtool_cmd COMMAND
-        ${imgtool_sign} ${imgtool_args} --pad --confirm ${merged_hex}
-        ${output}.signed.confirmed.hex)
+        ${imgtool_sign} ${imgtool_args} --pad --pad-header --confirm
+        ${merged_hex} ${output}.signed.confirmed.hex)
     endif()
 
     if(NOT "${keyfile_enc}" STREQUAL "")

samples/dfu/ab/boards/nrf54h20dk_nrf54h20_cpuapp.overlay

@@ -9,5 +9,8 @@
 / {
 	chosen {
 		zephyr,boot-mode = &boot_request;
+		zephyr,code-partition = &cpuapp_slot0_partition;
 	};
 };
+
+secondary_app_partition: &cpuapp_slot1_partition {};

samples/dfu/ab/src/ab_utils.c

@@ -39,12 +39,16 @@ LOG_MODULE_DECLARE(ab_sample);
 
 #define SLOT_A_OFFSET FIXED_PARTITION_OFFSET(SLOT_A_PARTITION)
 #define SLOT_B_OFFSET FIXED_PARTITION_OFFSET(SLOT_B_PARTITION)
+#define SLOT_A_SIZE FIXED_PARTITION_SIZE(SLOT_A_PARTITION)
+#define SLOT_B_SIZE FIXED_PARTITION_SIZE(SLOT_B_PARTITION)
 
 #define SLOT_A_FLASH_AREA_ID FIXED_PARTITION_ID(SLOT_A_PARTITION)
 #define SLOT_B_FLASH_AREA_ID FIXED_PARTITION_ID(SLOT_B_PARTITION)
 
-#define IS_SLOT_A (CODE_PARTITION_OFFSET == SLOT_A_OFFSET)
-#define IS_SLOT_B (CODE_PARTITION_OFFSET == SLOT_B_OFFSET)
+#define IS_SLOT_A (CODE_PARTITION_OFFSET >= SLOT_A_OFFSET && \
+		   CODE_PARTITION_OFFSET < SLOT_A_OFFSET + SLOT_A_SIZE)
+#define IS_SLOT_B (CODE_PARTITION_OFFSET >= SLOT_B_OFFSET && \
+		   CODE_PARTITION_OFFSET < SLOT_B_OFFSET + SLOT_B_SIZE)
 
 #endif /* CONFIG_PARTITION_MANAGER_ENABLED */
 

samples/dfu/ab/sysbuild/ipc_radio.overlay

@@ -0,0 +1,15 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+#include "nrf54h20dk_nrf54h20_memory_map.dtsi"
+
+/ {
+	chosen {
+		zephyr,code-partition = &cpurad_slot0_partition;
+	};
+};
+
+secondary_app_partition: &cpurad_slot1_partition {};

samples/dfu/ab/sysbuild/nrf54h20dk_nrf54h20_memory_map.dtsi

@@ -5,14 +5,59 @@
  */
 
 /* On nRF54H20 the Direct XIP mode is supported in the merged slot configuration
- * Merge application and radio slots by extending the application partition.
+ * Extend slot0_partition and slot1_partition to cover both application and
+ * radio images, as well as MCUboot image metadata (header and trailer).
+ * Those partitions will be used by MCUboot to verify the merged image to boot.
+ * Apart from that, they will be used by the MCUmgr subsystem to correctly
+ * handle flags, stored inside the MCUboot image trailer.
+ * Use cpu<app|rad>_slot<0|1>_partition as zephyr,code-partition, so the
+ * application and radio sizes are correctly reported.
  */
-&cpuapp_slot0_partition {
-	reg = <0x40000 DT_SIZE_K(656)>;
-};
+/delete-node/&cpuapp_slot0_partition;
+/delete-node/&cpuapp_slot1_partition;
+/delete-node/&cpurad_slot0_partition;
+/delete-node/&cpurad_slot1_partition;
+
+&mram1x {
+	partitions {
+		/* Merged partition used by the MCUboot (variant 0). */
+		slot0_partition: partition@40000 {
+			reg = <0x40000 DT_SIZE_K(656)>;
+		};
+
+		/* Application code partition (variant 0).
+		 * Offset by the MCUboot header size (2048 bytes).
+		 */
+		cpuapp_slot0_partition: partition@40800 {
+			reg = <0x40800 DT_SIZE_K(326)>;
+		};
+
+		/* Radio code partition (variant 0).
+		 * Reduced by the MCUboot trailer size (224 bytes).
+		 */
+		cpurad_slot0_partition: partition@92000 {
+			reg = <0x92000 (DT_SIZE_K(328) - 224)>;
+		};
 
-&cpuapp_slot1_partition {
-	reg = <0x100000 DT_SIZE_K(656)>;
+		/* Merged partition used by the MCUboot (variant 1). */
+		slot1_partition: partition@100000 {
+			reg = <0x100000 DT_SIZE_K(656)>;
+		};
+
+		/* Application code partition (variant 1).
+		 * Offset by the MCUboot header size (2048 bytes).
+		 */
+		cpuapp_slot1_partition: partition@100800 {
+			reg = <0x100800 DT_SIZE_K(326)>;
+		};
+
+		/* Radio code partition (variant 1).
+		 * Reduced by the MCUboot trailer size (224 bytes).
+		 */
+		cpurad_slot1_partition: partition@152000 {
+			reg = <0x152000 (DT_SIZE_K(328) - 224)>;
+		};
+	};
 };
 
 / {

samples/zephyr/smp_svr_mini_boot/boards/nrf54h20dk_nrf54h20_cpuapp.overlay

@@ -5,3 +5,11 @@
  */
 
 #include "../sysbuild/nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi"
+
+/ {
+	chosen {
+		zephyr,code-partition = &cpuapp_slot0_partition;
+	};
+};
+
+secondary_app_partition: &cpuapp_slot1_partition {};