3131
3232LOG_MODULE_REGISTER (mpsl_init , CONFIG_MPSL_LOG_LEVEL );
3333
34- #if defined(CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC ) && !defined( CONFIG_SOC_SERIES_NRF54HX )
34+ #if defined(CONFIG_MPSL_CALIBRATION_PERIOD )
3535static void mpsl_calibration_work_handler (struct k_work * work );
3636static K_WORK_DELAYABLE_DEFINE (calibration_work , mpsl_calibration_work_handler ) ;
3737#endif /* CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC && !CONFIG_SOC_SERIES_NRF54HX */
@@ -330,7 +330,7 @@ static uint8_t m_config_clock_source_get(void)
330330}
331331#endif /* !CONFIG_SOC_SERIES_NRF54HX */
332332
333- #if defined(CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC ) && !defined( CONFIG_SOC_SERIES_NRF54HX )
333+ #if defined(CONFIG_MPSL_CALIBRATION_PERIOD )
334334static atomic_t do_calibration ;
335335
336336static void mpsl_calibration_work_handler (struct k_work * work )
@@ -344,7 +344,7 @@ static void mpsl_calibration_work_handler(struct k_work *work)
344344 mpsl_calibration_timer_handle ();
345345
346346 mpsl_work_schedule (& calibration_work ,
347- K_MSEC (CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_PERIOD ));
347+ K_MSEC (CONFIG_MPSL_CALIBRATION_PERIOD ));
348348}
349349#endif /* CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC && !CONFIG_SOC_SERIES_NRF54HX */
350350
@@ -373,8 +373,9 @@ static int32_t mpsl_lib_init_internal(void)
373373 "MPSL requires clock calibration to be enabled when RC is used as LFCLK" );
374374
375375 /* clock_cfg.rc_ctiv is given in 1/4 seconds units.
376- * CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_PERIOD is given in ms. */
377- clock_cfg .rc_ctiv = (CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_PERIOD * 4 / 1000 );
376+ * CONFIG_MPSL_CALIBRATION_PERIOD is given in ms.
377+ */
378+ clock_cfg .rc_ctiv = (CONFIG_MPSL_CALIBRATION_PERIOD * 4 / 1000 );
378379 clock_cfg .rc_temp_ctiv = CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_MAX_SKIP + 1 ;
379380 BUILD_ASSERT (CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_TEMP_DIFF == 2 ,
380381 "MPSL always uses a temperature diff threshold of 0.5 degrees" );
@@ -469,10 +470,10 @@ static int mpsl_low_prio_init(void)
469470 IRQ_CONNECT (CONFIG_MPSL_LOW_PRIO_IRQN , MPSL_LOW_PRIO ,
470471 mpsl_low_prio_irq_handler , NULL , 0 );
471472
472- #if defined(CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC ) && !defined( CONFIG_SOC_SERIES_NRF54HX )
473+ #if defined(CONFIG_MPSL_CALIBRATION_PERIOD )
473474 atomic_set (& do_calibration , 1 );
474475 mpsl_work_schedule (& calibration_work ,
475- K_MSEC (CONFIG_CLOCK_CONTROL_NRF_CALIBRATION_PERIOD ));
476+ K_MSEC (CONFIG_MPSL_CALIBRATION_PERIOD ));
476477#endif /* CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC && !CONFIG_SOC_SERIES_NRF54HX */
477478
478479 return 0 ;
@@ -499,7 +500,7 @@ int32_t mpsl_lib_init(void)
499500int32_t mpsl_lib_uninit (void )
500501{
501502#if IS_ENABLED (CONFIG_MPSL_DYNAMIC_INTERRUPTS )
502- #if defined(CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC ) && !defined( CONFIG_SOC_SERIES_NRF54HX )
503+ #if defined(CONFIG_MPSL_CALIBRATION_PERIOD )
503504 atomic_set (& do_calibration , 0 );
504505#endif /* CONFIG_CLOCK_CONTROL_NRF_K32SRC_RC && !CONFIG_SOC_SERIES_NRF54HX */
505506
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