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tests: drivers: mspi: hpf: Add trap handler test
Force ASSERT call to trigger trap handler. Signed-off-by: Jakub Zymelka <[email protected]>
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/tests/drivers/fprotect/ @nrfconnect/ncs-pluto
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/tests/drivers/lpuart/ @nordic-krch
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/tests/drivers/mspi/app_fault_timer/ @nrfconnect/ncs-low-level-test @nrfconnect/ncs-ll-ursus
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/tests/drivers/mspi/trap_handler/ @nrfconnect/ncs-low-level-test @nrfconnect/ncs-ll-ursus
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/tests/drivers/nrfx_integration_test/ @nrfconnect/ncs-co-drivers
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/tests/drivers/pwm/gpio_loopback/ @nrfconnect/ncs-low-level-test
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/tests/drivers/uart/ @nrfconnect/ncs-low-level-test
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#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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cmake_minimum_required(VERSION 3.20.0)
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find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
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project(hpf_app_trap_handler)
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target_sources(app PRIVATE src/main.c)
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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&cpuflpr_code_partition {
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reg = <0x177000 DT_SIZE_K(24)>;
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};
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&sram_rx {
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reg = <0x20039000 0x07f0>;
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};
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&sram_tx {
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reg = <0x200397f0 0x07f0>;
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};
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&cpuflpr_error_code {
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reg = <0x20039fe0 0x0020>; /* 32bytes */
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};
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&cpuflpr_sram_code_data {
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compatible = "mmio-sram";
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reg = <0x2003a000 DT_SIZE_K(24)>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x2003a000 0x6000>;
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};
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&cpuapp_rram {
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reg = <0x0 DT_SIZE_K(1500)>;
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};
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&cpuapp_sram {
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reg = <0x20000000 DT_SIZE_K(228)>;
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ranges = <0x0 0x20000000 0x39000>;
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};
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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&sram_tx {
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reg = <0x20039000 0x07f0>;
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};
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&sram_rx {
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reg = <0x200397f0 0x07f0>;
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};
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&cpuflpr_error_code {
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reg = <0x20039fe0 0x0020>; /* 32bytes */
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};
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&cpuflpr_rram {
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reg = <0x177000 DT_SIZE_K(24)>;
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};
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&cpuflpr_code_partition {
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reg = <0x0 DT_SIZE_K(24)>;
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};
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&cpuflpr_sram {
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reg = <0x2003a000 DT_SIZE_K(24)>;
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ranges = <0x0 0x2003a000 0x6000>;
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};
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#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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CONFIG_TEST=y
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CONFIG_ZTEST=y
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CONFIG_FLASH=y
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CONFIG_FLASH_PAGE_LAYOUT=y
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CONFIG_MAIN_STACK_SIZE=2048
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CONFIG_ZTEST_STACK_SIZE=4096
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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include <zephyr/device.h>
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#include <zephyr/drivers/mspi.h>
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#include <zephyr/drivers/mspi_emul.h>
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#include <zephyr/ztest.h>
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#define MSPI_BUS_NODE DT_NODELABEL(sdp_mspi)
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static const struct device *mspi_devices[] = {
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DT_FOREACH_CHILD_STATUS_OKAY_SEP(MSPI_BUS_NODE, DEVICE_DT_GET, (,))
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};
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static struct mspi_dev_cfg device_cfg[] = {
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DT_FOREACH_CHILD_STATUS_OKAY_SEP(MSPI_BUS_NODE, MSPI_DEVICE_CONFIG_DT, (,))
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};
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ZTEST(hpf_trap_handler, test_trap_handler)
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{
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int ret = 0;
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const struct device *mspi_bus = DEVICE_DT_GET(MSPI_BUS_NODE);
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const struct mspi_dev_id dev_id = {
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.dev_idx = 0xFF,
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};
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zassert_true(device_is_ready(mspi_bus), "mspi_bus is not ready");
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zassert_true(device_is_ready(mspi_devices[0]), "mspi_device is not ready");
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/* Push wrong device id to trigger assert on flpr app side */
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ret = mspi_dev_config(mspi_bus, &dev_id, MSPI_DEVICE_CONFIG_ALL, &device_cfg[0]);
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zassert_equal(ret, -ETIMEDOUT, "Assert not triggered?");
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}
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ZTEST_SUITE(hpf_trap_handler, NULL, NULL, NULL, NULL, NULL);
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#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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SB_CONFIG_VPR_LAUNCHER=n
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SB_CONFIG_PARTITION_MANAGER=n
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SB_CONFIG_SDP=y
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SB_CONFIG_SDP_MSPI=y
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# Enable SDP developer mode to disable CI errors.
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# It is related to rebuilding the asm part after enabling ASSERT.
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SB_CONFIG_SDP_DEVELOPER_MODE=y
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common:
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tags:
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- ci_tests_drivers_sdp
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- drivers
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- mspi
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sysbuild: true
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harness: console
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harness_config:
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type: one_line
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regex:
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- ">>> SDP APP FATAL ERROR"
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tests:
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drivers.mspi.hpf_trap_handler:
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platform_allow:
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- nrf54l15dk/nrf54l15/cpuapp
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integration_platforms:
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- nrf54l15dk/nrf54l15/cpuapp
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extra_args:
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- EXTRA_DTC_OVERLAY_FILE="./boards/nrf54l15dk_nrf54l15_cpuapp_memory.overlay"
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- sdp_CONFIG_ASSERT=y
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- sdp_CONFIG_ASSERT_TEST=y
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- sdp_EXTRA_DTC_OVERLAY_FILE="${ZEPHYR_NRF_MODULE_DIR}/tests/drivers/mspi/trap_handler/boards/nrf54l15dk_nrf54l15_cpuflpr_memory.overlay"

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