Skip to content

Commit 521bfa2

Browse files
Hi-Im-Davidrob-robinson-14
authored and
nordicjm
committed
boards: nordic: Add nRF7120 PDK board
Add board files for nRF7120pdk Signed-off-by: David Jewsbury <[email protected]> Co-authored-by: Robert Robinson <[email protected]>
1 parent cd50c27 commit 521bfa2

16 files changed

+577
-0
lines changed

‎boards/nordic/nrf7120pdk/Kconfig.defconfig‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
# Copyright (c) 2025 Nordic Semiconductor ASA
2+
# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
3+
4+
if BOARD_NRF7120PDK_NRF7120_CPUAPP
5+
6+
config BT_CTLR
7+
default BT
8+
9+
endif # BOARD_NRF7120PDK_NRF7120_CPUAPP

‎boards/nordic/nrf7120pdk/Kconfig.nrf7120pdk‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,6 @@
1+
# Copyright (c) 2025 Nordic Semiconductor ASA
2+
# SPDX-License-Identifier: Apache-2.0
3+
config BOARD_NRF7120PDK
4+
select SOC_NRF7120_ENGA_CPUAPP if BOARD_NRF7120PDK_NRF7120_CPUAPP
5+
select SOC_NRF7120_ENGA_CPUFLPR if BOARD_NRF7120PDK_NRF7120_CPUFLPR || \
6+
BOARD_NRF7120PDK_NRF7120_CPUFLPR_XIP

‎boards/nordic/nrf7120pdk/board.cmake‎

Lines changed: 12 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,12 @@
1+
# Copyright (c) 2025 Nordic Semiconductor ASA
2+
# SPDX-License-Identifier: Apache-2.0
3+
4+
if(CONFIG_SOC_NRF7120_ENGA_CPUAPP)
5+
board_runner_args(jlink "--device=cortex-m33" "--speed=4000")
6+
elseif(CONFIG_SOC_NRF7120_ENGA_CPUFLPR)
7+
board_runner_args(jlink "--speed=4000")
8+
endif()
9+
10+
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
11+
include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
12+
include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)

‎boards/nordic/nrf7120pdk/board.yml‎

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,8 @@
1+
board:
2+
name: nrf7120pdk
3+
vendor: nordic
4+
socs:
5+
- name: nrf7120
6+
variants:
7+
- name: xip
8+
cpucluster: cpuflpr

‎boards/nordic/nrf7120pdk/nrf7120_cpuapp_common.dtsi‎

Lines changed: 130 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,130 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
/* This file is common to the secure and non-secure domain */
8+
9+
#include "arm/nordic/nrf7120_enga_cpuapp.dtsi"
10+
#include "nrf7120pdk_nrf7120-common.dtsi"
11+
12+
/ {
13+
chosen {
14+
zephyr,console = &uart20;
15+
zephyr,shell-uart = &uart20;
16+
zephyr,uart-mcumgr = &uart20;
17+
zephyr,flash = &cpuapp_mram;
18+
zephyr,ieee802154 = &ieee802154;
19+
};
20+
};
21+
22+
&cpuapp_sram {
23+
status = "okay";
24+
};
25+
26+
&grtc {
27+
owned-channels = <0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15>;
28+
/* Channels 7-11 reserved for Zero Latency IRQs, 3-4 for FLPR */
29+
child-owned-channels = <3 4 7 8 9 10 11>;
30+
status = "okay";
31+
};
32+
33+
&cpuapp_mram {
34+
partitions {
35+
compatible = "fixed-partitions";
36+
#address-cells = <1>;
37+
#size-cells = <1>;
38+
39+
boot_partition: partition@0 {
40+
label = "mcuboot";
41+
reg = <0x0 DT_SIZE_K(64)>;
42+
};
43+
44+
slot0_partition: partition@10000 {
45+
label = "image-0";
46+
reg = <0x10000 DT_SIZE_K(960)>;
47+
};
48+
49+
slot0_ns_partition: partition@100000 {
50+
label = "image-0-nonsecure";
51+
reg = <0x100000 DT_SIZE_K(960)>;
52+
};
53+
54+
slot1_partition: partition@1f0000 {
55+
label = "image-1";
56+
reg = <0x1f0000 DT_SIZE_K(960)>;
57+
};
58+
59+
slot1_ns_partition: partition@2e0000 {
60+
label = "image-1-nonsecure";
61+
reg = <0x2e0000 DT_SIZE_K(960)>;
62+
};
63+
64+
/* 32k from 0x3d0000 to 0x2d7fff reserved for TF-M partitions */
65+
storage_partition: partition@3d8000 {
66+
label = "storage";
67+
reg = < 0x3d8000 DT_SIZE_K(36)>;
68+
};
69+
};
70+
};
71+
72+
&uart20 {
73+
status = "okay";
74+
};
75+
76+
&gpio0 {
77+
status = "okay";
78+
};
79+
80+
&gpio1 {
81+
status = "okay";
82+
};
83+
84+
&gpio2 {
85+
status = "okay";
86+
};
87+
88+
&gpio3 {
89+
status = "okay";
90+
};
91+
92+
&gpio4 {
93+
status = "okay";
94+
};
95+
96+
&gpiote20 {
97+
status = "okay";
98+
};
99+
100+
&gpiote30 {
101+
status = "okay";
102+
};
103+
104+
&radio {
105+
status = "okay";
106+
};
107+
108+
&ieee802154 {
109+
status = "okay";
110+
};
111+
112+
&temp {
113+
status = "okay";
114+
};
115+
116+
&clock {
117+
status = "okay";
118+
};
119+
120+
&spi00 {
121+
status = "okay";
122+
cs-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
123+
pinctrl-0 = <&spi00_default>;
124+
pinctrl-1 = <&spi00_sleep>;
125+
pinctrl-names = "default", "sleep";
126+
};
127+
128+
&adc {
129+
status = "okay";
130+
};

‎boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120-common.dtsi‎

Lines changed: 109 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,109 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
#include "nrf7120pdk_nrf7120-pinctrl.dtsi"
8+
9+
/ {
10+
leds {
11+
compatible = "gpio-leds";
12+
13+
led0: led_0 {
14+
gpios = <&gpio2 9 GPIO_ACTIVE_HIGH>;
15+
label = "Green LED 0";
16+
};
17+
18+
led1: led_1 {
19+
gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
20+
label = "Green LED 1";
21+
};
22+
23+
led2: led_2 {
24+
gpios = <&gpio2 7 GPIO_ACTIVE_HIGH>;
25+
label = "Green LED 2";
26+
};
27+
28+
led3: led_3 {
29+
gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
30+
label = "Green LED 3";
31+
};
32+
};
33+
34+
pwmleds {
35+
compatible = "pwm-leds";
36+
/*
37+
* PWM signal can be exposed on GPIO pin only within same domain.
38+
* There is only one domain which contains both PWM and GPIO:
39+
* PWM20/21/22 and GPIO Port P1.
40+
* Only LEDs connected to P1 can work with PWM, for example LED1.
41+
*/
42+
43+
pwm_led1: pwm_led_1 {
44+
pwms = <&pwm20 0 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
45+
};
46+
};
47+
48+
buttons {
49+
compatible = "gpio-keys";
50+
51+
button0: button_0 {
52+
gpios = <&gpio1 13 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
53+
label = "Push button 0";
54+
zephyr,code = <INPUT_KEY_0>;
55+
};
56+
57+
button1: button_1 {
58+
gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
59+
label = "Push button 1";
60+
zephyr,code = <INPUT_KEY_1>;
61+
};
62+
63+
button2: button_2 {
64+
gpios = <&gpio1 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
65+
label = "Push button 2";
66+
zephyr,code = <INPUT_KEY_2>;
67+
};
68+
69+
button3: button_3 {
70+
gpios = <&gpio0 4 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
71+
label = "Push button 3";
72+
zephyr,code = <INPUT_KEY_3>;
73+
};
74+
};
75+
76+
aliases {
77+
led0 = &led0;
78+
led1 = &led1;
79+
led2 = &led2;
80+
led3 = &led3;
81+
pwm-led0 = &pwm_led1;
82+
sw0 = &button0;
83+
sw1 = &button1;
84+
sw2 = &button2;
85+
sw3 = &button3;
86+
watchdog0 = &wdt31;
87+
};
88+
};
89+
90+
&uart20 {
91+
current-speed = <115200>;
92+
pinctrl-0 = <&uart20_default>;
93+
pinctrl-1 = <&uart20_sleep>;
94+
pinctrl-names = "default", "sleep";
95+
};
96+
97+
&uart30 {
98+
current-speed = <115200>;
99+
pinctrl-0 = <&uart30_default>;
100+
pinctrl-1 = <&uart30_sleep>;
101+
pinctrl-names = "default", "sleep";
102+
};
103+
104+
&pwm20 {
105+
status = "okay";
106+
pinctrl-0 = <&pwm20_default>;
107+
pinctrl-1 = <&pwm20_sleep>;
108+
pinctrl-names = "default", "sleep";
109+
};

‎boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120-pinctrl.dtsi‎

Lines changed: 82 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,82 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor
3+
* SPDX-License-Identifier: Apache-2.0
4+
*/
5+
6+
&pinctrl {
7+
/omit-if-no-ref/ uart20_default: uart20_default {
8+
group1 {
9+
psels = <NRF_PSEL(UART_TX, 1, 4)>,
10+
<NRF_PSEL(UART_RTS, 1, 6)>;
11+
};
12+
13+
group2 {
14+
psels = <NRF_PSEL(UART_RX, 1, 5)>,
15+
<NRF_PSEL(UART_CTS, 1, 7)>;
16+
bias-pull-up;
17+
};
18+
};
19+
20+
/omit-if-no-ref/ uart20_sleep: uart20_sleep {
21+
group1 {
22+
psels = <NRF_PSEL(UART_TX, 1, 4)>,
23+
<NRF_PSEL(UART_RX, 1, 5)>,
24+
<NRF_PSEL(UART_RTS, 1, 6)>,
25+
<NRF_PSEL(UART_CTS, 1, 7)>;
26+
low-power-enable;
27+
};
28+
};
29+
30+
/omit-if-no-ref/ uart30_default: uart30_default {
31+
group1 {
32+
psels = <NRF_PSEL(UART_TX, 0, 0)>,
33+
<NRF_PSEL(UART_RTS, 0, 2)>;
34+
};
35+
36+
group2 {
37+
psels = <NRF_PSEL(UART_RX, 0, 1)>,
38+
<NRF_PSEL(UART_CTS, 0, 3)>;
39+
bias-pull-up;
40+
};
41+
};
42+
43+
/omit-if-no-ref/ uart30_sleep: uart30_sleep {
44+
group1 {
45+
psels = <NRF_PSEL(UART_TX, 0, 0)>,
46+
<NRF_PSEL(UART_RX, 0, 1)>,
47+
<NRF_PSEL(UART_RTS, 0, 2)>,
48+
<NRF_PSEL(UART_CTS, 0, 3)>;
49+
low-power-enable;
50+
};
51+
};
52+
53+
/omit-if-no-ref/ spi00_default: spi00_default {
54+
group1 {
55+
psels = <NRF_PSEL(SPIM_SCK, 2, 1)>,
56+
<NRF_PSEL(SPIM_MOSI, 2, 2)>,
57+
<NRF_PSEL(SPIM_MISO, 2, 4)>;
58+
};
59+
};
60+
61+
/omit-if-no-ref/ spi00_sleep: spi00_sleep {
62+
group1 {
63+
psels = <NRF_PSEL(SPIM_SCK, 2, 1)>,
64+
<NRF_PSEL(SPIM_MOSI, 2, 2)>,
65+
<NRF_PSEL(SPIM_MISO, 2, 4)>;
66+
low-power-enable;
67+
};
68+
};
69+
70+
/omit-if-no-ref/ pwm20_default: pwm20_default {
71+
group1 {
72+
psels = <NRF_PSEL(PWM_OUT0, 1, 10)>;
73+
};
74+
};
75+
76+
/omit-if-no-ref/ pwm20_sleep: pwm20_sleep {
77+
group1 {
78+
psels = <NRF_PSEL(PWM_OUT0, 1, 10)>;
79+
low-power-enable;
80+
};
81+
};
82+
};

‎boards/nordic/nrf7120pdk/nrf7120pdk_nrf7120_cpuapp.dts‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,18 @@
1+
/*
2+
* Copyright (c) 2025 Nordic Semiconductor ASA
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
/dts-v1/;
8+
9+
#include "nrf7120_cpuapp_common.dtsi"
10+
11+
/ {
12+
compatible = "nordic,nrf7120pdk_nrf7120-cpuapp";
13+
model = "Nordic nRF7120 PDK nRF7120 Application MCU";
14+
15+
chosen {
16+
zephyr,sram = &cpuapp_sram;
17+
};
18+
};

0 commit comments

Comments
 (0)