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tests: drivers: gpio: Add test for SWD and GPIO on the same pin
Add test that confirms that package pin where SWD interface is located, can be used as an ordinary GPIO. Signed-off-by: Sebastian Głąb <[email protected]>
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‎tests/drivers/gpio/gpio_swd/CMakeLists.txt‎

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#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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cmake_minimum_required(VERSION 3.20.0)
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find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
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project(gpio_swd)
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FILE(GLOB app_sources src/main.c)
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target_sources(app PRIVATE ${app_sources})

‎tests/drivers/gpio/gpio_swd/Readme.txt‎

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This test was initially dedicated to nrf54ls05b which has SWD and GPIO shared on the same package pin:
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- SWDIO at P1.29,
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- SWDCLK at P1.30.
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SWD functionality shall be disabled some time after the reset and package pin shall behave as an ordinary GPIO.
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Currently, this is blocked by lack of support in MDK - to be added in MDK 8.73.0.
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Missing implementation, details available in NRFX-8363.
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Test checks that:
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- selected GPIO can be configured as input;
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- selected GPIO can be configured as output;
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- when pin is configured as output HIGH, reading state of the pin returns HIGH;
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- when pin is configured as output LOW, reading state of the pin returns LOW;

‎tests/drivers/gpio/gpio_swd/boards/nrf54l15dk_nrf54l15_cpuapp.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/ {
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/* Test requirements:
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* No other driver on out-gpios[n]
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*/
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zephyr,user {
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out-gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>, <&gpio1 10 GPIO_ACTIVE_HIGH>,
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<&gpio2 8 GPIO_ACTIVE_HIGH>, <&gpio2 10 GPIO_ACTIVE_HIGH>;
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};
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};

‎tests/drivers/gpio/gpio_swd/boards/nrf54ls05dk_nrf54ls05b_cpuapp.overlay‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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/ {
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/* Test requirements:
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* No other driver on out-gpios[n]
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*/
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zephyr,user {
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out-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>, <&gpio1 31 GPIO_ACTIVE_HIGH>,
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<&gpio1 29 GPIO_ACTIVE_HIGH>, <&gpio1 30 GPIO_ACTIVE_HIGH>;
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};
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};
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&gpio1 {
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status = "okay";
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};

‎tests/drivers/gpio/gpio_swd/prj.conf‎

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CONFIG_GPIO=y
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CONFIG_ZTEST=y
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CONFIG_LOG=y

‎tests/drivers/gpio/gpio_swd/src/main.c‎

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/*
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* Copyright (c) 2025 Nordic Semiconductor ASA
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*
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* SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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*/
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#include <zephyr/logging/log.h>
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LOG_MODULE_REGISTER(gpio_swd, LOG_LEVEL_INF);
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#include <zephyr/kernel.h>
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#include <zephyr/drivers/gpio.h>
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#include <zephyr/ztest.h>
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#if !DT_NODE_HAS_PROP(DT_PATH(zephyr_user), out_gpios)
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#error "Unsupported board: out_gpios are not defined"
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#endif
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const struct gpio_dt_spec out_pins[] = {
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DT_FOREACH_PROP_ELEM_SEP(DT_PATH(zephyr_user), out_gpios, GPIO_DT_SPEC_GET_BY_IDX, (,))
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};
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BUILD_ASSERT(ARRAY_SIZE(out_pins) > 0, "missing out pins");
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const uint8_t npins = ARRAY_SIZE(out_pins);
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/**
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* @brief Test if GPIOs can be configured as inputs.
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*/
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ZTEST(gpio_swd, test_configure_input)
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{
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uint8_t i;
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int rc;
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for (i = 0; i < npins; i++) {
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rc = gpio_pin_configure_dt(&out_pins[i], GPIO_INPUT);
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zassert_equal(rc, 0, "[%d]: Port %s, pin %d, config GPIO_INPUT failed",
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i, out_pins[i].port->name, out_pins[i].pin);
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}
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}
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/**
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* @brief Test if GPIOs can be configured as outputs.
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*/
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ZTEST(gpio_swd, test_configure_output)
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{
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uint8_t i;
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int rc;
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for (i = 0; i < npins; i++) {
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rc = gpio_pin_configure_dt(&out_pins[i], GPIO_OUTPUT);
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zassert_equal(rc, 0, "[%d]: Port %s, pin %d, config GPIO_OUTPUT failed",
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i, out_pins[i].port->name, out_pins[i].pin);
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}
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}
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/**
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* @brief Test if GPIOs configured as output can have its value set.
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*/
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ZTEST(gpio_swd, test_set_output)
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{
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uint8_t i;
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int rc;
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for (i = 0; i < npins; i++) {
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rc = gpio_pin_configure_dt(&out_pins[i], GPIO_OUTPUT_HIGH);
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zassert_equal(rc, 0, "[%d]: Port %s, pin %d, config high failed",
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i, out_pins[i].port->name, out_pins[i].pin);
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rc = gpio_pin_get_dt(&out_pins[i]);
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zassert_equal(rc, 1, "[%d]: Port %s, pin %d is not high",
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i, out_pins[i].port->name, out_pins[i].pin);
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rc = gpio_pin_configure_dt(&out_pins[i], GPIO_OUTPUT_LOW);
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zassert_equal(rc, 0, "[%d]: Port %s, pin %d, config low failed",
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i, out_pins[i].port->name, out_pins[i].pin);
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rc = gpio_pin_get_dt(&out_pins[i]);
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zassert_equal(rc, 0, "[%d]: Port %s, pin %d is not low",
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i, out_pins[i].port->name, out_pins[i].pin);
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}
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}
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/**
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* @brief Test if GPIOs configured as output can have its value set.
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*/
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ZTEST(gpio_swd, test_set_output_after_5_seconds)
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{
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uint8_t i;
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int rc;
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k_msleep(5000);
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for (i = 0; i < npins; i++) {
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rc = gpio_pin_configure_dt(&out_pins[i], GPIO_OUTPUT_HIGH);
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zassert_equal(rc, 0, "[%d]: Port %s, pin %d, config high failed",
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i, out_pins[i].port->name, out_pins[i].pin);
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rc = gpio_pin_get_dt(&out_pins[i]);
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zassert_equal(rc, 1, "[%d]: Port %s, pin %d is not high",
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i, out_pins[i].port->name, out_pins[i].pin);
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rc = gpio_pin_configure_dt(&out_pins[i], GPIO_OUTPUT_LOW);
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zassert_equal(rc, 0, "[%d]: Port %s, pin %d, config low failed",
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i, out_pins[i].port->name, out_pins[i].pin);
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rc = gpio_pin_get_dt(&out_pins[i]);
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zassert_equal(rc, 0, "[%d]: Port %s, pin %d is not low",
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i, out_pins[i].port->name, out_pins[i].pin);
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}
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}
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static void *suite_setup(void)
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{
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uint8_t i;
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TC_PRINT("Test executed on %s\n", CONFIG_BOARD_TARGET);
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TC_PRINT("GPIO count: %d\n", npins);
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for (i = 0; i < npins; i++) {
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TC_PRINT("%d: Port %s, pin %d\n", i, out_pins[i].port->name, out_pins[i].pin);
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}
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TC_PRINT("===================================================================\n");
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for (i = 0; i < npins; i++) {
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zassert_true(gpio_is_ready_dt(&out_pins[i]), "OUT[%d] is not ready", i);
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}
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return NULL;
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}
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ZTEST_SUITE(gpio_swd, NULL, suite_setup, NULL, NULL, NULL);

‎tests/drivers/gpio/gpio_swd/testcase.yaml‎

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common:
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tags:
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- drivers
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- gpio
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- ci_tests_drivers_gpio
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depends_on: gpio
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harness: ztest
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harness_config:
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fixture: gpio_loopback
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tests:
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drivers.gpio.gpio_swd:
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platform_allow:
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- nrf54l15dk/nrf54l15/cpuapp
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- nrf54ls05dk/nrf54ls05b/cpuapp
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- [email protected]/nrf54ls05b/cpuapp
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integration_platforms:
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- nrf54ls05dk/nrf54ls05b/cpuapp

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