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modules: tf-m: Add support for nRF54L10 non secure target
Add support for the non secure target: nrf54l15dk/nrf54l10/cpuapp/ns in NCS. This defines the target and iherits nearly all configuration and code from nRF54L15. An exception to that was the default RAM region for TF-M which was reduced to 64KB. Ref: NCSDK-30404 Signed-off-by: Georgios Vasilakis <[email protected]>
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modules/trusted-firmware-m/Kconfig.tfm.defconfig

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@@ -11,6 +11,7 @@ config TFM_BOARD
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default "${ZEPHYR_NRF_MODULE_DIR}/modules/trusted-firmware-m/tfm_boards/nrf9120" if SOC_NRF9120
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default "${ZEPHYR_NRF_MODULE_DIR}/modules/trusted-firmware-m/tfm_boards/nrf5340_cpuapp" if SOC_NRF5340_CPUAPP
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default "${ZEPHYR_NRF_MODULE_DIR}/modules/trusted-firmware-m/tfm_boards/nrf54l15_cpuapp" if SOC_NRF54L15_CPUAPP
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default "${ZEPHYR_NRF_MODULE_DIR}/modules/trusted-firmware-m/tfm_boards/nrf54l10_cpuapp" if SOC_NRF54L10_CPUAPP
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depends on TRUSTED_EXECUTION_NONSECURE
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if BUILD_WITH_TFM

modules/trusted-firmware-m/Kconfig.tfm.pm

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@@ -14,7 +14,11 @@ config PM_PARTITION_SIZE_TFM_SRAM
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# It has been observed for 54L that when Matter is enabled, then
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# assigning 0x16000 of RAM to TFM will not leave enough RAM for
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# Matter. So we use 0x13000 of RAM on 54L.
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default 0x13000 if SOC_SERIES_NRF54LX
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default 0x13000 if SOC_NRF54L15_CPUAPP
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# Set the of TFM_SRAM to 0x10000(64kB) since the nR54L10
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# has less RAM. The number was selected based on the observed memory
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# usage of TFM in crypto samples and it can be changed later if needed.
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default 0x10000 if SOC_NRF54L10_CPUAPP
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default 0x16000 if SOC_SERIES_NRF91X
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default 0x30000
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help

modules/trusted-firmware-m/tfm_boards/CMakeLists.txt

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@@ -87,10 +87,10 @@ if (${TFM_PARTITION_CRYPTO})
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$<$<BOOL:${CONFIG_HW_UNIQUE_KEY_RANDOM}>:CONFIG_HW_UNIQUE_KEY_RANDOM>
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)
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# nrf54l15 uses the PSA headers in the hw_unique_key_cracen_kmu.c file, which means
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# nrf54l15/nrf54l10 use the PSA headers in the hw_unique_key_cracen_kmu.c file, which means
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# that we need to make sure that the nrf_security PSA headers are included
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# before any other PSA-related headers.
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if(NRF_SOC_VARIANT STREQUAL nrf54l15)
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if(NRF_SOC_VARIANT MATCHES "nrf54l1[05]")
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target_link_libraries(platform_crypto_keys
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PRIVATE
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psa_crypto_library_config
@@ -221,7 +221,7 @@ file(COPY ${CMAKE_CURRENT_LIST_DIR}/common
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DESTINATION ${INSTALL_PLATFORM_NS_DIR})
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if(NRF_SOC_VARIANT STREQUAL nrf54l15)
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if(NRF_SOC_VARIANT MATCHES "nrf54l1[05]")
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file(COPY ${ZEPHYR_NRF_MODULE_DIR}/subsys/nrf_security/src/drivers/cracen/cracenpsa/include/cracen_psa_key_ids.h
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DESTINATION ${INSTALL_INTERFACE_INC_DIR})
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file(COPY ${ZEPHYR_NRF_MODULE_DIR}/subsys/nrf_security/src/drivers/cracen/cracenpsa/include/cracen_psa_kmu.h

modules/trusted-firmware-m/tfm_boards/board/device_cfg.h

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@@ -13,17 +13,8 @@
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#undef ARRAY_SIZE
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#include <zephyr/devicetree.h>
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#if !defined(NRF54L15_XXAA)
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#if defined(CONFIG_TFM_SECURE_UART0) || DOMAIN_NS == 1U
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#define TFM_UART uart0
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#endif /* defined(CONFIG_TFM_SECURE_UART0) || DOMAIN_NS == 1U */
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#if defined(CONFIG_TFM_SECURE_UART1) && DOMAIN_NS != 1U
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#define TFM_UART uart1
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#endif /* defined(CONFIG_TFM_SECURE_UART1) */
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#else /* NRF54L15_XXAA */
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#if defined(NRF54L15_XXAA) || defined(NRF54L10_XXAA)
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#if defined(CONFIG_TFM_SECURE_UART00) && DOMAIN_NS != 1U
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#define TFM_UART uart00
@@ -45,7 +36,17 @@
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#define TFM_UART uart30
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#endif /* defined(CONFIG_TFM_SECURE_UART30) */
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#endif /* NRF54L15_XXAA */
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#else /* NRF54L15_XXAA || NRF54L10_XXAA */
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#if defined(CONFIG_TFM_SECURE_UART0) || DOMAIN_NS == 1U
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#define TFM_UART uart0
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#endif /* defined(CONFIG_TFM_SECURE_UART0) || DOMAIN_NS == 1U */
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#if defined(CONFIG_TFM_SECURE_UART1) && DOMAIN_NS != 1U
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#define TFM_UART uart1
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#endif /* defined(CONFIG_TFM_SECURE_UART1) */
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#endif /* NRF54L15_XXAA || NRF54L10_XXAA */
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#define DEFAULT_UART_BAUDRATE DT_PROP_OR(DT_NODELABEL(TFM_UART), current_speed, 115200)
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modules/trusted-firmware-m/tfm_boards/common/assert.c

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@@ -22,7 +22,7 @@
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M2S(PM_TFM_NONSECURE_ADDRESS) \
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"\nwhich is not aligned with the SPU/MPC HW requirements." \
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"\nIn nRF53/nRF91 series the flash region need to be aligned with the SPU region size." \
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"\nIn nRF54L15 the flash region need to be aligned with the MPC region size." \
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"\nIn nRF54L15/nRF54L10 the flash region need to be aligned with the MPC region size." \
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"\nRefer to the documentation section 'TF-M partition alignment requirements'" \
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"\nfor more information.\n\n"
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@@ -33,7 +33,7 @@
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#pragma message \
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"SRAM non-secure address is not aligned to SPU/MPC HW requirements" \
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"\nIn nRF53/nRF91 series the RAM region need to be aligned with the SPU region size." \
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"\nIn nRF54L15 the RAM region need to be aligned with the MPC region size.\n\n"
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"\nIn nRF54L15/nRF54L10 the RAM region need to be aligned with the MPC region size.\n\n"
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#error "SRAM non-secure start address is not aligned to SPU/MPC HW requirements"
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#endif

modules/trusted-firmware-m/tfm_boards/external_core.cmake

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@@ -136,10 +136,10 @@ if(TARGET platform_s)
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# Required for system_nrfxx_approtect.h.
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$<$<BOOL:${CONFIG_NRF_APPROTECT_LOCK}>:ENABLE_APPROTECT>
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$<$<BOOL:${CONFIG_NRF_APPROTECT_USER_HANDLING}>:ENABLE_APPROTECT_USER_HANDLING>
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$<$<BOOL:${CONFIG_NRF_APPROTECT_USER_HANDLING}>:ENABLE_AUTHENTICATED_APPROTECT> # nRF54L15
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$<$<BOOL:${CONFIG_NRF_APPROTECT_USER_HANDLING}>:ENABLE_AUTHENTICATED_APPROTECT> # nRF54L15/nRF54L10
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$<$<BOOL:${CONFIG_NRF_SECURE_APPROTECT_LOCK}>:ENABLE_SECURE_APPROTECT>
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$<$<BOOL:${CONFIG_NRF_SECURE_APPROTECT_LOCK}>:ENABLE_SECUREAPPROTECT> # nRF54L15
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$<$<BOOL:${CONFIG_NRF_SECURE_APPROTECT_LOCK}>:ENABLE_SECUREAPPROTECT> # nRF54L15/nRF54L10
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$<$<BOOL:${CONFIG_NRF_SECURE_APPROTECT_USER_HANDLING}>:ENABLE_SECURE_APPROTECT_USER_HANDLING>
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$<$<BOOL:${CONFIG_NRF_SECURE_APPROTECT_USER_HANDLING}>:ENABLE_AUTHENTICATED_SECUREAPPROTECT> # nRF54L15
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$<$<BOOL:${CONFIG_NRF_SECURE_APPROTECT_USER_HANDLING}>:ENABLE_AUTHENTICATED_SECUREAPPROTECT> # nRF54L15/nRF54L10
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)
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endif()
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#
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# Copyright (c) 2025, Nordic Semiconductor ASA.
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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set(NRF_BOARD_SELECTED True)
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add_subdirectory(${Trusted\ Firmware\ M_SOURCE_DIR}/platform/ext/target/nordic_nrf/common/nrf54l10 nrf54l10)
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add_subdirectory(.. tfm_board)
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target_include_directories(platform_s
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PUBLIC
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${ZEPHYR_NRF_MODULE_DIR}/subsys/nrf_security/src/drivers/cracen/cracenpsa/include
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)
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target_sources(platform_s
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PRIVATE
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${ZEPHYR_BASE}/soc/nordic/nrf54l/soc.c
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)
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target_include_directories(platform_s
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PRIVATE
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${ZEPHYR_BASE}/modules/cmsis/
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${ZEPHYR_BASE}/soc/nordic/nrf54l
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${ZEPHYR_BASE}/soc/nordic/common
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)
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# nrf54l10_application.h should be defining __ICACHE_PRESENT, but
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# it is not, until this is fixed we define it here.
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target_compile_definitions(platform_s
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PRIVATE
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__ICACHE_PRESENT=1
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)
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install(FILES ${CMAKE_CURRENT_LIST_DIR}/ns/cpuarch_ns.cmake
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DESTINATION ${INSTALL_PLATFORM_NS_DIR}
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RENAME cpuarch.cmake)
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install(FILES config.cmake
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DESTINATION ${INSTALL_PLATFORM_NS_DIR})
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install(FILES ../common/config.cmake
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DESTINATION ${INSTALL_PLATFORM_NS_DIR}/../common/)
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install(DIRECTORY ${Trusted\ Firmware\ M_SOURCE_DIR}/platform/ext/target/nordic_nrf/nrf54l15dk_nrf54l10_cpuapp/tests
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DESTINATION ${INSTALL_PLATFORM_NS_DIR}
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)
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#-------------------------------------------------------------------------------
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# Copyright (c) 2025, Nordic Semiconductor ASA.
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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#-------------------------------------------------------------------------------
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include(${CMAKE_CURRENT_LIST_DIR}/../common/config.cmake)
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set(NRF_SOC_VARIANT nrf54l10 CACHE STRING "nRF SoC Variant")
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include(${PLATFORM_PATH}/common/${NRF_SOC_VARIANT}/config.cmake)
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# Override PS_CRYPTO_KDF_ALG
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set(PS_CRYPTO_KDF_ALG PSA_ALG_SP800_108_COUNTER_CMAC CACHE STRING "KDF Algorithm to use")
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# attest_hal.c includes bl_storage.h, which needs CONFIG_NRFX_RRAMC to be defined.
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# This is because bl_storage is a lib intended to be run from either the bootloader (Zephyr) or from TF-M.
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# This is independent from the NS image's CONFIG_NRFX_RRAMC, which must be disabled, so we can not inherit
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# this from app Kconfig.
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if(TFM_PARTITION_INITIAL_ATTESTATION)
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add_compile_definitions(CONFIG_NRFX_RRAMC)
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endif()
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#
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# Copyright (c) 2025, Nordic Semiconductor ASA.
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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set(PLATFORM_PATH platform/ext/target/nordic_nrf)
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include(${PLATFORM_PATH}/common/nrf54l10/cpuarch.cmake)
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add_compile_definitions(__NRF_TFM__)
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#
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# Copyright (c) 2025, Nordic Semiconductor ASA.
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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set(PLATFORM_DIR ${CMAKE_CURRENT_LIST_DIR})
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set(PLATFORM_PATH ${CMAKE_CURRENT_LIST_DIR})
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include(${CMAKE_CURRENT_LIST_DIR}/common/nrf54l10/cpuarch.cmake)

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