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ankunsrlubos
ankuns
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mpsl: fem: nRF22xx initialization for nRF54L
The nrf2200 and nrf2240 pins on nrf54l require inter-domain connections. The function `mpsl_fem_utils_gpiote_pin_init` is provided for this purpose which uses the features provided by nrfx 3.8.0. Signed-off-by: Andrzej Kuros <[email protected]>
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-6
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5 files changed

+115
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lines changed

‎subsys/mpsl/fem/Kconfig‎

Lines changed: 12 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -120,7 +120,12 @@ config MPSL_FEM_NRF2220
120120
select EXPERIMENTAL
121121
select NRFX_GPIOTE
122122
select NRFX_PPI if SOC_SERIES_NRF52X
123-
select NRFX_DPPI if SOC_SERIES_NRF53X
123+
select NRFX_DPPI0 if SOC_SERIES_NRF53X
124+
select NRFX_GPPI if SOC_SERIES_NRF54LX
125+
select NRFX_DPPI10 if SOC_SERIES_NRF54LX
126+
select NRFX_DPPI20 if SOC_SERIES_NRF54LX
127+
select NRFX_PPIB11 if SOC_SERIES_NRF54LX
128+
select NRFX_PPIB21 if SOC_SERIES_NRF54LX
124129
select PINCTRL
125130
select MPSL_FEM_NCS_SUPPORTED_FEM_USED
126131
bool "nRF2220 front-end module"
@@ -132,7 +137,12 @@ config MPSL_FEM_NRF2240
132137
select EXPERIMENTAL
133138
select NRFX_GPIOTE
134139
select NRFX_PPI if SOC_SERIES_NRF52X
135-
select NRFX_DPPI if SOC_SERIES_NRF53X
140+
select NRFX_DPPI0 if SOC_SERIES_NRF53X
141+
select NRFX_GPPI if SOC_SERIES_NRF54LX
142+
select NRFX_DPPI10 if SOC_SERIES_NRF54LX
143+
select NRFX_DPPI20 if SOC_SERIES_NRF54LX
144+
select NRFX_PPIB11 if SOC_SERIES_NRF54LX
145+
select NRFX_PPIB21 if SOC_SERIES_NRF54LX
136146
select PINCTRL
137147
select MPSL_FEM_NCS_SUPPORTED_FEM_USED
138148
bool "nRF2240 front-end module"

‎subsys/mpsl/fem/common/include/mpsl_fem_utils.h‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -102,4 +102,13 @@ int mpsl_fem_utils_ppi_channel_alloc(uint8_t *ppi_channels, size_t size);
102102
*/
103103
void mpsl_fem_extended_pin_to_mpsl_fem_pin(uint32_t pin_num, mpsl_fem_pin_t *p_fem_pin);
104104

105+
/** @brief Initializes the gpiote pin according to the configuration.
106+
*
107+
* @param[inout] gpiote_pin Configuration of gpiote pin.
108+
*
109+
* @return 0 in case of success, appropriate error code otherwise.
110+
*/
111+
int mpsl_fem_utils_gpiote_pin_init(mpsl_fem_gpiote_pin_config_t *gpiote_pin);
112+
113+
105114
#endif /* MPSL_FEM_UTILS_H__ */

‎subsys/mpsl/fem/common/mpsl_fem_utils.c‎

Lines changed: 58 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,12 +15,23 @@
1515
#elif IS_ENABLED(CONFIG_HAS_HW_NRF_DPPIC)
1616
#include <nrfx_dppi.h>
1717
#endif
18+
#if defined(NRF54L_SERIES)
19+
#include <hal/nrf_gpiote.h>
20+
#include <nrfx_ppib.h>
21+
#include <helpers/nrfx_gppi.h>
22+
#endif
1823

1924
int mpsl_fem_utils_ppi_channel_alloc(uint8_t *ppi_channels, size_t size)
2025
{
2126
nrfx_err_t err = NRFX_ERROR_NOT_SUPPORTED;
2227
#ifdef DPPI_PRESENT
28+
#if defined(NRF53_SERIES)
2329
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(0);
30+
#elif defined(NRF54L_SERIES)
31+
nrfx_dppi_t dppi = NRFX_DPPI_INSTANCE(10);
32+
#else
33+
#error Unsupported SoC series
34+
#endif
2435
#endif
2536

2637
for (int i = 0; i < size; i++) {
@@ -47,3 +58,50 @@ void mpsl_fem_extended_pin_to_mpsl_fem_pin(uint32_t pin_num, mpsl_fem_pin_t *p_f
4758

4859
p_fem_pin->port_pin = pin_num;
4960
}
61+
62+
int mpsl_fem_utils_gpiote_pin_init(mpsl_fem_gpiote_pin_config_t *gpiote_pin)
63+
{
64+
#if defined(NRF54L_SERIES)
65+
nrfx_err_t err;
66+
uint8_t ppib_ch = 0;
67+
uint8_t gppi_ch = 0;
68+
nrfx_ppib_interconnect_t ppib11_21 = NRFX_PPIB_INTERCONNECT_INSTANCE(11, 21);
69+
70+
err = nrfx_ppib_channel_alloc(&ppib11_21, &ppib_ch);
71+
if (err != NRFX_SUCCESS) {
72+
return -ENOMEM;
73+
}
74+
gpiote_pin->ppib_channels[0] = ppib_ch;
75+
76+
err = nrfx_gppi_channel_alloc(&gppi_ch);
77+
if (err != NRFX_SUCCESS) {
78+
return -ENOMEM;
79+
}
80+
81+
nrfx_gppi_channel_endpoints_setup(gppi_ch,
82+
nrfx_ppib_receive_event_address_get(&ppib11_21.right, ppib_ch),
83+
nrf_gpiote_task_address_get(gpiote_pin->p_gpiote,
84+
nrf_gpiote_clr_task_get(gpiote_pin->gpiote_ch_id)));
85+
86+
nrfx_gppi_channels_enable(1U << gppi_ch);
87+
88+
err = nrfx_ppib_channel_alloc(&ppib11_21, &ppib_ch);
89+
if (err != NRFX_SUCCESS) {
90+
return -ENOMEM;
91+
}
92+
gpiote_pin->ppib_channels[1] = ppib_ch;
93+
94+
err = nrfx_gppi_channel_alloc(&gppi_ch);
95+
if (err != NRFX_SUCCESS) {
96+
return -ENOMEM;
97+
}
98+
99+
nrfx_gppi_channel_endpoints_setup(gppi_ch,
100+
nrfx_ppib_receive_event_address_get(&ppib11_21.right, ppib_ch),
101+
nrf_gpiote_task_address_get(gpiote_pin->p_gpiote,
102+
nrf_gpiote_set_task_get(gpiote_pin->gpiote_ch_id)));
103+
104+
nrfx_gppi_channels_enable(1U << gppi_ch);
105+
#endif
106+
return 0;
107+
}

‎subsys/mpsl/fem/nrf2220/mpsl_fem_nrf2220.c‎

Lines changed: 18 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -113,7 +113,10 @@ static int fem_nrf2220_configure(void)
113113
},
114114
.enable = true,
115115
.active_high = MPSL_FEM_GPIO_POLARITY_GET(cs_gpios),
116-
.gpiote_ch_id = cs_gpiote_channel
116+
.gpiote_ch_id = cs_gpiote_channel,
117+
#if defined(NRF54L_SERIES)
118+
.p_gpiote = cs_gpiote.p_reg,
119+
#endif
117120
},
118121
.md_pin_config = {
119122
.gpio_pin = {
@@ -123,7 +126,10 @@ static int fem_nrf2220_configure(void)
123126
},
124127
.enable = true,
125128
.active_high = MPSL_FEM_GPIO_POLARITY_GET(md_gpios),
126-
.gpiote_ch_id = md_gpiote_channel
129+
.gpiote_ch_id = md_gpiote_channel,
130+
#if defined(NRF54L_SERIES)
131+
.p_gpiote = md_gpiote.p_reg,
132+
#endif
127133
}
128134
};
129135

@@ -157,6 +163,16 @@ static int fem_nrf2220_configure(void)
157163
return err;
158164
}
159165

166+
err = mpsl_fem_utils_gpiote_pin_init(&cfg.cs_pin_config);
167+
if (err) {
168+
return err;
169+
}
170+
171+
err = mpsl_fem_utils_gpiote_pin_init(&cfg.md_pin_config);
172+
if (err) {
173+
return err;
174+
}
175+
160176
err = mpsl_fem_nrf2220_interface_config_set(&cfg);
161177

162178
return err;

‎subsys/mpsl/fem/nrf2240/mpsl_fem_nrf2240.c‎

Lines changed: 18 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -126,7 +126,10 @@ static int fem_nrf2240_configure(void)
126126
},
127127
.enable = true,
128128
.active_high = MPSL_FEM_GPIO_POLARITY_GET(cs_gpios),
129-
.gpiote_ch_id = cs_gpiote_channel
129+
.gpiote_ch_id = cs_gpiote_channel,
130+
#if defined(NRF54L_SERIES)
131+
.p_gpiote = cs_gpiote.p_reg,
132+
#endif
130133
},
131134
.md_pin_config = {
132135
.gpio_pin = {
@@ -136,7 +139,10 @@ static int fem_nrf2240_configure(void)
136139
},
137140
.enable = true,
138141
.active_high = MPSL_FEM_GPIO_POLARITY_GET(md_gpios),
139-
.gpiote_ch_id = md_gpiote_channel
142+
.gpiote_ch_id = md_gpiote_channel,
143+
#if defined(NRF54L_SERIES)
144+
.p_gpiote = md_gpiote.p_reg,
145+
#endif
140146
},
141147
#if DT_NODE_HAS_PROP(DT_NODELABEL(nrf_radio_fem), pwrmd_gpios)
142148
.pwrmd_pin_config = {
@@ -181,6 +187,16 @@ static int fem_nrf2240_configure(void)
181187
return err;
182188
}
183189

190+
err = mpsl_fem_utils_gpiote_pin_init(&cfg.cs_pin_config);
191+
if (err) {
192+
return err;
193+
}
194+
195+
err = mpsl_fem_utils_gpiote_pin_init(&cfg.md_pin_config);
196+
if (err) {
197+
return err;
198+
}
199+
184200
err = mpsl_fem_nrf2240_interface_config_set(&cfg);
185201

186202
return err;

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