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Added information about the driver selection process.
Added additional details about crypto drivers.
NCSDK-33433, NCSDK-33436, NCSDK-30042.
Signed-off-by: Grzegorz Ferenc <[email protected]>
Copy file name to clipboardExpand all lines: doc/nrf/glossary.rst
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@@ -189,7 +189,12 @@ Glossary
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In the |NCS|, this term is used in the context of `ARM TrustZone`_ and :ref:`app_boards_spe_nspe` (:term:`Non-Secure Processing Environment (NSPE)` and :term:`Secure Processing Environment (SPE)`).
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CRACEN
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A hardware cryptographic engine within nRF54H devices.
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A hardware crypto accelerator within nRF54L Series devices, and the name of the :term:`cryptographic driver <Cryptographic driver>` in the |NCS|.
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For more information, see :ref:`ug_nrf54l_crypto_kmu_cracen_peripherals` on the :ref:`ug_nrf54l_cryptography` page.
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Cryptographic driver
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A specialized component that implements specific cryptographic algorithms or provides access to hardware accelerators.
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See :ref:`crypto_drivers` for more information.
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Data Terminal Ready (DTR)
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A control signal in RS-232 serial communications transmitted from data terminal equipment, such as a computer, to data communication equipment.
Copy file name to clipboardExpand all lines: doc/nrf/libraries/security/nrf_security/doc/driver_config.rst
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@@ -64,7 +64,6 @@ The nrf_oberon driver may then be disabled by using the Kconfig option :kconfig:
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On nRF54L Series devices, CRACEN is the only source of entropy.
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Therefore, it is not possible to disable the :kconfig:option:`CONFIG_PSA_CRYPTO_DRIVER_CRACEN` Kconfig option when the Zephyr entropy driver is enabled.
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.. _nrf_security_drivers_config_multiple:
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Configuring multiple drivers
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Configuring cryptographic features
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**********************************
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You can enable a cryptographic feature or algorithm using `CONFIG_PSA_WANT_ALG_*`_ Kconfig options, which are specific for PSA Crypto API configurations.
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You can enable a cryptographic feature or algorithm using `CONFIG_PSA_WANT_*`_ Kconfig options, which are specific for PSA Crypto API configurations.
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For example, to enable the AES algorithm, set the :kconfig:option:`CONFIG_PSA_WANT_ALG_AES` Kconfig option.
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For a list of supported cryptographic features and algorithms and the Kconfig options to enable them, see :ref:`ug_crypto_supported_features`.
Copy file name to clipboardExpand all lines: doc/nrf/releases_and_maturity/releases/release-notes-changelog.rst
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* Added the new section about :ref:`ug_crypto_index`.
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The new section includes pages about :ref:`ug_crypto_architecture` (new page) and :ref:`crypto_drivers` (moved from :ref:`nrf_security` library).
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* Updated the :ref:`ug_tfm_logging` page with more details about how to configure logging on the same UART instance as the application for nRF5340 and nRF91 Series devices.
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* Updated:
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* The :ref:`ug_tfm_logging` page with more details about how to configure logging on the same UART instance as the application for nRF5340 and nRF91 Series devices.
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* The :ref:`crypto_drivers` page with more details about the driver selection process.
Copy file name to clipboardExpand all lines: doc/nrf/security/crypto/crypto_architecture.rst
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* Application calls the PSA Crypto implementation through the PSA Crypto API.
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* The PSA Crypto API implementation is an abstraction layer that manages cryptographic operations, key handling, and driver coordination.
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The implementations can be different, but they should all conform to the PSA Crypto specification.
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* Crypto driver is a specialized component that implements specific cryptographic algorithms or provides access to hardware accelerators.
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The implementations can be different, but they should all conform to the PSA Crypto API standard.
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* Cryptographic driver is a specialized component that implements specific cryptographic algorithms or provides access to hardware accelerators.
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* Storage integration provides persistent and secure storage capabilities through standardized PSA Secure Storage APIs.
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It implements storage interfaces that allow the PSA Crypto implementation to securely store and retrieve keys, ensuring proper protection of sensitive material throughout its lifecycle.
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* Hardware platform is the physical device with security features, such as cryptographic hardware engines or secure storage.
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.. _ug_crypto_architecture_interaction_flow:
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@@ -80,6 +81,12 @@ The Oberon PSA Crypto is a library that serves as the central component managing
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The Oberon PSA Crypto acts as the implementation provider, directly exposing the PSA Crypto API to applications.
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Each driver can implement support for different subsets of cryptographic algorithms, providing software support for algorithms that hardware cannot support.
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This implementation standard is suitable for applications that prioritize simplicity and do not require the additional security isolation provided by TF-M.
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It offers direct access to cryptographic functionality with minimal overhead, making it ideal for resource-constrained applications.
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Driver selection in the Oberon PSA Crypto implementation
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Oberon PSA Crypto driver library selection
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This implementation standard is suitable for applications that prioritize simplicity and do not require the additional security isolation provided by TF-M.
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It offers direct access to cryptographic functionality with minimal overhead, making it ideal for resource-constrained applications.
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For more information about the driver selection, see :ref:`crypto_drivers`.
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Storage integration for the Oberon PSA Crypto implementation
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TF-M Crypto Service implementation
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In this architecture, TF-M implements the secure cryptographic service using the existing Oberon PSA Core and its associated drivers within the secure environment.
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Additionally, TF-M integrates key storage using its internal mechanisms, offering secure key management through :ref:`Internal Trusted Storage <ug_tfm_services_its>` and :ref:`Protected Storage <tfm_partition_ps>`.
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This implementation leverages TF-M's Secure Processing Environment (SPE) to isolate cryptographic operations from the Non-Secure Processing Environment (NSPE).
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TF-M is built on top of TrustZone technology and isolates the PSA Crypto API as non-secure callable calls into a secure processing environment.
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Cryptographic keys are stored and isolated in the SPE, ensuring they are not accessible by the application running in the NSPE.
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The cryptographic drivers (nrf_cc3xx, nrf_oberon, and CRACEN) are available within the secure environment, providing consistent cryptographic capabilities.
:alt:TF-M Crypto Service implementation in the NSPE and SPE
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:align:center
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TF-M Crypto Service implementation in the NSPE and SPE
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In this architecture, TF-M implements the secure cryptographic service using the existing Oberon PSA Core and its associated drivers within the secure environment.
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Cryptographic keys are stored and isolated in the SPE, ensuring they are not accessible by the application running in the NSPE.
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The same cryptographic drivers (nrf_cc3xx, nrf_oberon, and CRACEN) are available within the secure environment, providing consistent cryptographic capabilities.
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Additionally, TF-M integrates key storage using its internal mechanisms, offering secure key management through :ref:`Internal Trusted Storage <ug_tfm_services_its>` and :ref:`Protected Storage <tfm_partition_ps>`.
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This implementation standard is mandatory for applications requiring PSA Certified security levels and provides the highest level of security through hardware-enforced isolation.
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This implementation standard is mandatory for applications requiring higher `PSA Certified security levels <PSA Certified IoT Security Framework_>`_ and provides the highest level of security through hardware-enforced isolation.
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It ensures that cryptographic operations and key material remain protected even if the non-secure application is compromised.
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Driver selection in the TF-M Crypto Service implementation
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