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tests: drivers: Add MSPI driver test based on multiple SPISes
Add a test that allows verifying the functionality of an MSPI driver using multiple SPIS peripherals (one per IO line). TX transfers only for now, with a configuration using sQSPI on nRF54H20. Signed-off-by: Andrzej Głąbek <[email protected]>
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‎CODEOWNERS‎

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/tests/drivers/fprotect/ @nrfconnect/ncs-pluto
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/tests/drivers/lpuart/ @nordic-krch @nrfconnect/ncs-low-level-test
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/tests/drivers/mspi/app_fault_timer/ @nrfconnect/ncs-low-level-test @nrfconnect/ncs-ll-ursus
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/tests/drivers/mspi/mspi_with_spis/ @nrfconnect/ncs-low-level-test
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/tests/drivers/mspi/trap_handler/ @nrfconnect/ncs-low-level-test @nrfconnect/ncs-ll-ursus
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/tests/drivers/nrf_wifi/ @sachinthegreen @krish2718
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/tests/drivers/nrfx_integration_test/ @nrfconnect/ncs-co-drivers

‎tests/drivers/mspi/mspi_with_spis/CMakeLists.txt‎

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#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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cmake_minimum_required(VERSION 3.20.0)
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find_package(Zephyr REQUIRED HINTS $ENV{ZEPHYR_BASE})
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project(mspi_with_spis)
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target_sources(app PRIVATE src/main.c)

‎tests/drivers/mspi/mspi_with_spis/boards/nrf54h20dk_nrf54h20_cpuapp_sqspi.overlay‎

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/*
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* Wiring required for the test:
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* - P7.0 <-> P0.0
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* - P7.1 <-> P0.5
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* - P7.2 <-> P0.6
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* - P7.3 <-> P0.7
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* - P7.4 <-> P0.8
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* - P7.5 <-> P0.9
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*/
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&pinctrl {
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sqspi_default: sqspi_default {
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group1 {
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psels = <NRF_PSEL(SDP_MSPI_SCK, 7, 0)>,
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<NRF_PSEL(SDP_MSPI_CS0, 7, 5)>,
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<NRF_PSEL(SDP_MSPI_DQ0, 7, 1)>;
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nordic,drive-mode = <NRF_DRIVE_E0E1>;
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};
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group2 {
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psels = <NRF_PSEL(SDP_MSPI_DQ1, 7, 2)>,
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<NRF_PSEL(SDP_MSPI_DQ2, 7, 3)>,
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<NRF_PSEL(SDP_MSPI_DQ3, 7, 4)>;
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nordic,drive-mode = <NRF_DRIVE_E0E1>;
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bias-pull-up;
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};
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};
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sqspi_sleep: sqspi_sleep {
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group1 {
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low-power-enable;
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psels = <NRF_PSEL(SDP_MSPI_SCK, 7, 0)>,
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<NRF_PSEL(SDP_MSPI_CS0, 7, 5)>,
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<NRF_PSEL(SDP_MSPI_DQ0, 7, 1)>,
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<NRF_PSEL(SDP_MSPI_DQ1, 7, 2)>,
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<NRF_PSEL(SDP_MSPI_DQ2, 7, 3)>,
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<NRF_PSEL(SDP_MSPI_DQ3, 7, 4)>;
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};
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};
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spis130_default_alt: spis130_default_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 0, 0)>,
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<NRF_PSEL(SPIS_MOSI, 0, 5)>,
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<NRF_PSEL_DISCONNECTED(SPIS_MISO)>,
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<NRF_PSEL(SPIS_CSN, 0, 9)>;
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};
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};
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spis130_sleep_alt: spis130_sleep_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 0, 0)>,
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<NRF_PSEL(SPIS_MOSI, 0, 5)>,
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<NRF_PSEL_DISCONNECTED(SPIS_MISO)>,
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<NRF_PSEL(SPIS_CSN, 0, 9)>;
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low-power-enable;
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};
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};
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spis131_default_alt: spis131_default_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 0, 0)>,
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<NRF_PSEL(SPIS_MOSI, 0, 6)>,
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<NRF_PSEL_DISCONNECTED(SPIS_MISO)>,
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<NRF_PSEL(SPIS_CSN, 0, 9)>;
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};
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};
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spis131_sleep_alt: spis131_sleep_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 0, 0)>,
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<NRF_PSEL(SPIS_MOSI, 0, 6)>,
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<NRF_PSEL_DISCONNECTED(SPIS_MISO)>,
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<NRF_PSEL(SPIS_CSN, 0, 9)>;
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low-power-enable;
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};
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};
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spis132_default_alt: spis132_default_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 0, 0)>,
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<NRF_PSEL(SPIS_MOSI, 0, 7)>,
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<NRF_PSEL_DISCONNECTED(SPIS_MISO)>,
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<NRF_PSEL(SPIS_CSN, 0, 9)>;
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};
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};
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spis132_sleep_alt: spis132_sleep_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 0, 0)>,
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<NRF_PSEL(SPIS_MOSI, 0, 7)>,
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<NRF_PSEL_DISCONNECTED(SPIS_MISO)>,
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<NRF_PSEL(SPIS_CSN, 0, 9)>;
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low-power-enable;
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};
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};
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spis133_default_alt: spis133_default_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 0, 0)>,
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<NRF_PSEL(SPIS_MOSI, 0, 8)>,
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<NRF_PSEL_DISCONNECTED(SPIS_MISO)>,
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<NRF_PSEL(SPIS_CSN, 0, 9)>;
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};
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};
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spis133_sleep_alt: spis133_sleep_alt {
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group1 {
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psels = <NRF_PSEL(SPIS_SCK, 0, 0)>,
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<NRF_PSEL(SPIS_MOSI, 0, 8)>,
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<NRF_PSEL_DISCONNECTED(SPIS_MISO)>,
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<NRF_PSEL(SPIS_CSN, 0, 9)>;
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low-power-enable;
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};
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};
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};
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&cpuflpr_vpr {
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pinctrl-0 = <&sqspi_default>;
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pinctrl-1 = <&sqspi_sleep>;
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pinctrl-names = "default", "sleep";
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interrupts = <212 NRF_DEFAULT_IRQ_PRIORITY>;
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status = "okay";
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/delete-property/ execution-memory;
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};
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/delete-node/ &cpuflpr_code_data;
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/delete-node/ &cpuapp_cpuflpr_ipc_shm;
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/delete-node/ &cpuflpr_cpuapp_ipc_shm;
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/delete-node/ &cpuapp_cpuflpr_ipc;
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&ram21_region {
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status = "okay";
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softperiph_ram: memory@0 {
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reg = <0 0x4000>;
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ranges;
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#address-cells = <1>;
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#size-cells = <1>;
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dut: sqspi: sqspi@3e00 {
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compatible = "nordic,nrf-sqspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x3e00 0x200>;
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zephyr,pm-device-runtime-auto;
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memory-regions = <&sqspi_buffers>;
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};
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};
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sqspi_buffers: memory@4000 {
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compatible = "zephyr,memory-region";
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reg = <0x4000 0x4000>;
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#memory-region-cells = <0>;
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zephyr,memory-region = "SQSPI_BUFFERS";
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zephyr,memory-attr = <DT_MEM_CACHEABLE>;
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};
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};
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&cpuapp_dma_region {
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status = "okay";
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};
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test_line0: &spi130 {
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compatible = "nordic,nrf-spis";
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status = "okay";
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def-char = <0x00>;
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pinctrl-0 = <&spis130_default_alt>;
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pinctrl-1 = <&spis130_sleep_alt>;
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pinctrl-names = "default", "sleep";
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memory-regions = <&cpuapp_dma_region>;
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/delete-property/rx-delay-supported;
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/delete-property/rx-delay;
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};
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test_line1: &spi131 {
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compatible = "nordic,nrf-spis";
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status = "okay";
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def-char = <0x00>;
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pinctrl-0 = <&spis131_default_alt>;
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pinctrl-1 = <&spis131_sleep_alt>;
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pinctrl-names = "default", "sleep";
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memory-regions = <&cpuapp_dma_region>;
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/delete-property/rx-delay-supported;
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/delete-property/rx-delay;
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};
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test_line2: &spi132 {
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compatible = "nordic,nrf-spis";
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status = "okay";
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def-char = <0x00>;
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pinctrl-0 = <&spis132_default_alt>;
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pinctrl-1 = <&spis132_sleep_alt>;
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pinctrl-names = "default", "sleep";
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memory-regions = <&cpuapp_dma_region>;
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/delete-property/rx-delay-supported;
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/delete-property/rx-delay;
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};
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test_line3: &spi133 {
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compatible = "nordic,nrf-spis";
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status = "okay";
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def-char = <0x00>;
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pinctrl-0 = <&spis133_default_alt>;
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pinctrl-1 = <&spis133_sleep_alt>;
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pinctrl-names = "default", "sleep";
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memory-regions = <&cpuapp_dma_region>;
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/delete-property/rx-delay-supported;
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/delete-property/rx-delay;
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};

‎tests/drivers/mspi/mspi_with_spis/prj.conf‎

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#
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# Copyright (c) 2025 Nordic Semiconductor ASA
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#
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# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
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#
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CONFIG_TEST=y
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CONFIG_ZTEST=y
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CONFIG_MSPI=y
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CONFIG_SPI=y
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CONFIG_SPI_SLAVE=y
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CONFIG_SPI_ASYNC=y

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