treewide: update error codes for nrfx_clock driver

Updated error codes for nrfx_clock and attached
nrfx and zephyr revisions.

Signed-off-by: Michal Frankiewicz <[email protected]>

Author: mif1-nordic

applications/nrf5340_audio/src/utils/peripherals.c

@@ -149,7 +149,6 @@ int peripherals_init(void)
 
 	/* Use this to turn on 128 MHz clock for cpu_app */
 	ret = nrfx_clock_divider_set(NRF_CLOCK_DOMAIN_HFCLK, NRF_CLOCK_HFCLK_DIV_1);
-	ret -= NRFX_ERROR_BASE_NUM;
 	if (ret) {
 		return ret;
 	}

drivers/mpsl/clock_control/nrfx_clock_mpsl.c

@@ -101,11 +101,11 @@ void nrfx_clock_enable(void)
 
 }
 
-nrfx_err_t nrfx_clock_init(nrfx_clock_event_handler_t handler)
+int nrfx_clock_init(nrfx_clock_event_handler_t handler)
 {
 	event_handler = handler;
 
-	return NRFX_SUCCESS;
+	return 0;
 }
 
 

samples/bluetooth/nrf_auraconfig/src/nrf_auraconfig.c

@@ -703,7 +703,6 @@ void nrf_auraconfig_main(void)
 	LOG_DBG("Main started");
 
 	ret = nrfx_clock_divider_set(NRF_CLOCK_DOMAIN_HFCLK, NRF_CLOCK_HFCLK_DIV_1);
-	ret -= NRFX_ERROR_BASE_NUM;
 	ERR_CHK_MSG(ret, "Failed to set HFCLK divider");
 
 	ret = led_init();

subsys/net/lib/nrf70_fw_ext/ext_fw_load.c

@@ -257,8 +257,7 @@ static void enable_xip_and_set_cpu_freq(void)
 		/* Set CPU frequency to 64MHz (DIV_2) */
 		int ret = nrfx_clock_divider_set(NRF_CLOCK_DOMAIN_HFCLK, NRF_CLOCK_HFCLK_DIV_2);
 
-		if (ret != NRFX_SUCCESS) {
-			ret -= NRFX_ERROR_BASE_NUM;
+		if (ret != 0) {
 			LOG_ERR("Failed to set CPU frequency: %d", ret);
 			return;
 		}
@@ -293,8 +292,7 @@ static void disable_xip_and_restore_cpu_freq(void)
 	if (current_divider != saved_divider) {
 		int ret = nrfx_clock_divider_set(NRF_CLOCK_DOMAIN_HFCLK, saved_divider);
 
-		if (ret != NRFX_SUCCESS) {
-			ret -= NRFX_ERROR_BASE_NUM;
+		if (ret != 0) {
 			LOG_ERR("Failed to restore CPU frequency: %d", ret);
 		} else {
 			LOG_DBG("CPU frequency restored to original value");

tests/bluetooth/iso/src/main.c

@@ -18,7 +18,6 @@ static int hfclock_config_and_start(void)
 	/* Use this to turn on 128 MHz clock for cpu_app */
 	ret = nrfx_clock_divider_set(NRF_CLOCK_DOMAIN_HFCLK, NRF_CLOCK_HFCLK_DIV_1);
 
-	ret -= NRFX_ERROR_BASE_NUM;
 	if (ret) {
 		return ret;
 	}