Revert "mpsl: hwres: dppi: Align to use NRFX_GPPI"

This reverts commit ab754742e5ecce54dd4fadcf2ef07aa0c933adfb.

Author: masz-nordic

subsys/mpsl/hwres/mpsl_dppi.c

@@ -5,64 +5,72 @@
  */
 
 #include <mpsl_dppi.h>
-#include <helpers/nrfx_gppi.h>
-
-#if defined(DPPI_PRESENT) || defined(LUMOS_XXAA)
-static bool mpsl_hwres_channel_alloc(uint32_t node_id, uint8_t *p_ch)
-{
-	int ch = nrfx_gppi_channel_alloc(node_id, NULL);
-
-	if (ch < 0) {
-		return false;
-	}
-	*p_ch = (uint8_t)ch;
-	return true;
-}
+#if defined(DPPI_PRESENT)
+#include <nrfx_dppi.h>
+#endif
+#if defined(LUMOS_XXAA)
+#include <nrfx_ppib.h>
 #endif
 
 #if defined(DPPI_PRESENT)
 
 bool mpsl_hwres_dppi_channel_alloc(NRF_DPPIC_Type *p_dppic, uint8_t *p_dppi_ch)
 {
-	return mpsl_hwres_channel_alloc(nrfx_gppi_domain_id_get((uint32_t)p_dppic), p_dppi_ch);
+	nrfx_dppi_t dppi = {0};
+	nrfx_err_t err = nrfx_dppi_periph_get((uintptr_t)p_dppic, &dppi);
+
+	if (err != NRFX_SUCCESS) {
+		return false;
+	}
+
+	return (nrfx_dppi_channel_alloc(&dppi, p_dppi_ch) == NRFX_SUCCESS);
 }
 
 #endif /* DPPI_PRESENT */
 
 #if defined(PPIB_PRESENT)
 
 #if defined(LUMOS_XXAA)
-#include <helpers/nrfx_gppi_lumos.h>
-static uint32_t ppib_get_domain(NRF_PPIB_Type *p_ppib)
+static const nrfx_ppib_interconnect_t *nrfx_ppib_interconnect_find_by_ptr(NRF_PPIB_Type *p_ppib)
 {
-	switch ((uint32_t)p_ppib) {
-	case (uint32_t)NRF_PPIB00:
-		/* fall through */
-	case (uint32_t)NRF_PPIB10:
-		return NRFX_GPPI_NODE_PPIB00_10;
-	case (uint32_t)NRF_PPIB11:
-		/* fall through */
-	case (uint32_t)NRF_PPIB21:
-		return NRFX_GPPI_NODE_PPIB11_21;
-	case (uint32_t)NRF_PPIB01:
-		/* fall through */
-	case (uint32_t)NRF_PPIB20:
-		return NRFX_GPPI_NODE_PPIB01_20;
-	case (uint32_t)NRF_PPIB22:
-		/* fall through */
-	case (uint32_t)NRF_PPIB30:
-		return NRFX_GPPI_NODE_PPIB22_30;
-	default:
-		__ASSERT_NO_MSG("Unexpected PPIB");
-		return 0;
+	static const nrfx_ppib_interconnect_t interconnects[] = {
+#if NRFX_CHECK(NRFX_PPIB00_ENABLED) && NRFX_CHECK(NRFX_PPIB10_ENABLED)
+		NRFX_PPIB_INTERCONNECT_INSTANCE(00, 10),
+#endif
+#if NRFX_CHECK(NRFX_PPIB11_ENABLED) && NRFX_CHECK(NRFX_PPIB21_ENABLED)
+		NRFX_PPIB_INTERCONNECT_INSTANCE(11, 21),
+#endif
+#if NRFX_CHECK(NRFX_PPIB22_ENABLED) && NRFX_CHECK(NRFX_PPIB30_ENABLED)
+		NRFX_PPIB_INTERCONNECT_INSTANCE(22, 30),
+#endif
+#if NRFX_CHECK(NRFX_PPIB01_ENABLED) && NRFX_CHECK(NRFX_PPIB20_ENABLED)
+		NRFX_PPIB_INTERCONNECT_INSTANCE(01, 20),
+#endif
+	};
+
+	for (size_t i = 0U; i < NRFX_ARRAY_SIZE(interconnects); ++i) {
+		const nrfx_ppib_interconnect_t *ith = &interconnects[i];
+
+		if ((ith->left.p_reg == p_ppib) || (ith->right.p_reg == p_ppib)) {
+			return ith;
+		}
 	}
+
+	return NULL;
 }
 #endif
 
 bool mpsl_hwres_ppib_channel_alloc(NRF_PPIB_Type *p_ppib, uint8_t *p_ppib_ch)
 {
 #if defined(LUMOS_XXAA)
-	return mpsl_hwres_channel_alloc(ppib_get_domain(p_ppib), p_ppib_ch);
+	const nrfx_ppib_interconnect_t *ppib_interconnect =
+		nrfx_ppib_interconnect_find_by_ptr(p_ppib);
+
+	if (ppib_interconnect == NULL) {
+		return false;
+	}
+
+	return (nrfx_ppib_channel_alloc(ppib_interconnect, p_ppib_ch) == NRFX_SUCCESS);
 #else
 	(void)p_ppib;
 	(void)p_ppib_ch;