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| 1 | +/* |
| 2 | + * Copyright (c) 2025 Nordic Semiconductor ASA |
| 3 | + * |
| 4 | + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause |
| 5 | + */ |
| 6 | + |
| 7 | +&pinctrl { |
| 8 | + spi120_default_test: spi120_default_test { |
| 9 | + group1 { |
| 10 | + psels = <NRF_PSEL(SPIM_MISO, 7, 6)>; |
| 11 | + }; |
| 12 | + |
| 13 | + group2 { |
| 14 | + psels = <NRF_PSEL(SPIM_SCK, 7, 3)>, |
| 15 | + <NRF_PSEL(SPIM_MOSI, 7, 7)>; |
| 16 | + nordic,drive-mode = <NRF_DRIVE_E0E1>; |
| 17 | + }; |
| 18 | + }; |
| 19 | + |
| 20 | + spi120_sleep_test: spi120_sleep_test { |
| 21 | + group1 { |
| 22 | + psels = <NRF_PSEL(SPIM_SCK, 7, 3)>, |
| 23 | + <NRF_PSEL(SPIM_MISO, 7, 6)>, |
| 24 | + <NRF_PSEL(SPIM_MOSI, 7, 7)>; |
| 25 | + low-power-enable; |
| 26 | + }; |
| 27 | + }; |
| 28 | + |
| 29 | + spi121_default_test: spi121_default_test { |
| 30 | + group1 { |
| 31 | + psels = <NRF_PSEL(SPIM_MISO, 6, 12)>; |
| 32 | + }; |
| 33 | + |
| 34 | + group2 { |
| 35 | + psels = <NRF_PSEL(SPIM_SCK, 6, 2)>, |
| 36 | + <NRF_PSEL(SPIM_MOSI, 6, 13)>; |
| 37 | + nordic,drive-mode = <NRF_DRIVE_E0E1>; |
| 38 | + }; |
| 39 | + }; |
| 40 | + |
| 41 | + spi121_sleep_test: spi121_sleep_test { |
| 42 | + group1 { |
| 43 | + psels = <NRF_PSEL(SPIM_SCK, 6, 2)>, |
| 44 | + <NRF_PSEL(SPIM_MISO, 6, 12)>, |
| 45 | + <NRF_PSEL(SPIM_MOSI, 6, 13)>; |
| 46 | + low-power-enable; |
| 47 | + }; |
| 48 | + }; |
| 49 | + |
| 50 | + spi130_default_test: spi130_default_test { |
| 51 | + group1 { |
| 52 | + psels = <NRF_PSEL(SPIM_SCK, 0, 0)>, |
| 53 | + <NRF_PSEL(SPIM_MISO, 0, 6)>, |
| 54 | + <NRF_PSEL(SPIM_MOSI, 0, 7)>; |
| 55 | + }; |
| 56 | + }; |
| 57 | + |
| 58 | + spi130_sleep_test: spi130_sleep_test { |
| 59 | + group1 { |
| 60 | + psels = <NRF_PSEL(SPIM_SCK, 0, 0)>, |
| 61 | + <NRF_PSEL(SPIM_MISO, 0, 6)>, |
| 62 | + <NRF_PSEL(SPIM_MOSI, 0, 7)>; |
| 63 | + low-power-enable; |
| 64 | + }; |
| 65 | + }; |
| 66 | + |
| 67 | + spi131_default_test: spi131_default_test { |
| 68 | + group1 { |
| 69 | + psels = <NRF_PSEL(SPIM_SCK, 0, 2)>, |
| 70 | + <NRF_PSEL(SPIM_MISO, 0, 8)>, |
| 71 | + <NRF_PSEL(SPIM_MOSI, 0, 9)>; |
| 72 | + }; |
| 73 | + }; |
| 74 | + |
| 75 | + spi131_sleep_test: spi131_sleep_test { |
| 76 | + group1 { |
| 77 | + psels = <NRF_PSEL(SPIM_SCK, 0, 2)>, |
| 78 | + <NRF_PSEL(SPIM_MISO, 0, 8)>, |
| 79 | + <NRF_PSEL(SPIM_MOSI, 0, 9)>; |
| 80 | + low-power-enable; |
| 81 | + }; |
| 82 | + }; |
| 83 | + |
| 84 | + spi132_default_test: spi132_default_test { |
| 85 | + group1 { |
| 86 | + psels = <NRF_PSEL(SPIM_SCK, 0, 3)>, |
| 87 | + <NRF_PSEL(SPIM_MISO, 0, 10)>, |
| 88 | + <NRF_PSEL(SPIM_MOSI, 0, 11)>; |
| 89 | + }; |
| 90 | + }; |
| 91 | + |
| 92 | + spi132_sleep_test: spi132_sleep_test { |
| 93 | + group1 { |
| 94 | + psels = <NRF_PSEL(SPIM_SCK, 0, 3)>, |
| 95 | + <NRF_PSEL(SPIM_MISO, 0, 10)>, |
| 96 | + <NRF_PSEL(SPIM_MOSI, 0, 11)>; |
| 97 | + low-power-enable; |
| 98 | + }; |
| 99 | + }; |
| 100 | + |
| 101 | + spi133_default_test: spi133_default_test { |
| 102 | + group1 { |
| 103 | + psels = <NRF_PSEL(SPIM_SCK, 1, 0)>, |
| 104 | + <NRF_PSEL(SPIM_MISO, 1, 4)>, |
| 105 | + <NRF_PSEL(SPIM_MOSI, 1, 5)>; |
| 106 | + }; |
| 107 | + }; |
| 108 | + |
| 109 | + spi133_sleep_test: spi133_sleep_test { |
| 110 | + group1 { |
| 111 | + psels = <NRF_PSEL(SPIM_SCK, 1, 0)>, |
| 112 | + <NRF_PSEL(SPIM_MISO, 1, 4)>, |
| 113 | + <NRF_PSEL(SPIM_MOSI, 1, 5)>; |
| 114 | + low-power-enable; |
| 115 | + }; |
| 116 | + }; |
| 117 | + |
| 118 | + spi134_default_test: spi134_default_test { |
| 119 | + group1 { |
| 120 | + psels = <NRF_PSEL(SPIM_SCK, 1, 1)>, |
| 121 | + <NRF_PSEL(SPIM_MISO, 1, 8)>, |
| 122 | + <NRF_PSEL(SPIM_MOSI, 2, 8)>; |
| 123 | + }; |
| 124 | + }; |
| 125 | + |
| 126 | + spi134_sleep_test: spi134_sleep_test { |
| 127 | + group1 { |
| 128 | + psels = <NRF_PSEL(SPIM_SCK, 1, 1)>, |
| 129 | + <NRF_PSEL(SPIM_MISO, 1, 8)>, |
| 130 | + <NRF_PSEL(SPIM_MOSI, 2, 8)>; |
| 131 | + low-power-enable; |
| 132 | + }; |
| 133 | + }; |
| 134 | + |
| 135 | + spi135_default_test: spi135_default_test { |
| 136 | + group1 { |
| 137 | + psels = <NRF_PSEL(SPIM_SCK, 1, 2)>, |
| 138 | + <NRF_PSEL(SPIM_MISO, 1, 9)>, |
| 139 | + <NRF_PSEL(SPIM_MOSI, 1, 11)>; |
| 140 | + }; |
| 141 | + }; |
| 142 | + |
| 143 | + spi135_sleep_test: spi135_sleep_test { |
| 144 | + group1 { |
| 145 | + psels = <NRF_PSEL(SPIM_SCK, 1, 2)>, |
| 146 | + <NRF_PSEL(SPIM_MISO, 1, 9)>, |
| 147 | + <NRF_PSEL(SPIM_MOSI, 1, 11)>; |
| 148 | + low-power-enable; |
| 149 | + }; |
| 150 | + }; |
| 151 | + |
| 152 | + spi137_default_test: spi137_default_test { |
| 153 | + group1 { |
| 154 | + psels = <NRF_PSEL(SPIM_SCK, 2, 2)>, |
| 155 | + <NRF_PSEL(SPIM_MISO, 2, 10)>, |
| 156 | + <NRF_PSEL(SPIM_MOSI, 2, 11)>; |
| 157 | + }; |
| 158 | + }; |
| 159 | + |
| 160 | + spi137_sleep_test: spi137_sleep_test { |
| 161 | + group1 { |
| 162 | + psels = <NRF_PSEL(SPIM_SCK, 2, 2)>, |
| 163 | + <NRF_PSEL(SPIM_MISO, 2, 10)>, |
| 164 | + <NRF_PSEL(SPIM_MOSI, 2, 11)>; |
| 165 | + low-power-enable; |
| 166 | + }; |
| 167 | + }; |
| 168 | +}; |
| 169 | + |
| 170 | +&exmif { |
| 171 | + status = "disabled"; |
| 172 | +}; |
| 173 | + |
| 174 | +&dma_fast_region { |
| 175 | + status = "okay"; |
| 176 | +}; |
| 177 | + |
| 178 | +&nfct { |
| 179 | + status = "disabled"; |
| 180 | + nfct-pins-as-gpios; |
| 181 | +}; |
| 182 | + |
| 183 | +&spi120 { |
| 184 | + status = "okay"; |
| 185 | + pinctrl-0 = <&spi120_default_test>; |
| 186 | + pinctrl-1 = <&spi120_sleep_test>; |
| 187 | + pinctrl-names = "default", "sleep"; |
| 188 | + overrun-character = <0x00>; |
| 189 | + memory-regions = <&dma_fast_region>; |
| 190 | +}; |
| 191 | + |
| 192 | +&spi121 { |
| 193 | + status = "okay"; |
| 194 | + pinctrl-0 = <&spi121_default_test>; |
| 195 | + pinctrl-1 = <&spi121_sleep_test>; |
| 196 | + pinctrl-names = "default", "sleep"; |
| 197 | + overrun-character = <0x00>; |
| 198 | + memory-regions = <&dma_fast_region>; |
| 199 | +}; |
| 200 | + |
| 201 | +&spi130 { |
| 202 | + status = "okay"; |
| 203 | + pinctrl-0 = <&spi130_default_test>; |
| 204 | + pinctrl-1 = <&spi130_sleep_test>; |
| 205 | + pinctrl-names = "default", "sleep"; |
| 206 | + overrun-character = <0x00>; |
| 207 | + memory-regions = <&cpuapp_dma_region>; |
| 208 | +}; |
| 209 | + |
| 210 | +&spi131 { |
| 211 | + status = "okay"; |
| 212 | + pinctrl-0 = <&spi131_default_test>; |
| 213 | + pinctrl-1 = <&spi131_sleep_test>; |
| 214 | + pinctrl-names = "default", "sleep"; |
| 215 | + overrun-character = <0x00>; |
| 216 | + memory-regions = <&cpuapp_dma_region>; |
| 217 | +}; |
| 218 | + |
| 219 | +&spi132 { |
| 220 | + status = "okay"; |
| 221 | + pinctrl-0 = <&spi132_default_test>; |
| 222 | + pinctrl-1 = <&spi132_sleep_test>; |
| 223 | + pinctrl-names = "default", "sleep"; |
| 224 | + overrun-character = <0x00>; |
| 225 | + memory-regions = <&cpuapp_dma_region>; |
| 226 | +}; |
| 227 | + |
| 228 | +&spi133 { |
| 229 | + status = "okay"; |
| 230 | + pinctrl-0 = <&spi133_default_test>; |
| 231 | + pinctrl-1 = <&spi133_sleep_test>; |
| 232 | + pinctrl-names = "default", "sleep"; |
| 233 | + overrun-character = <0x00>; |
| 234 | + memory-regions = <&cpuapp_dma_region>; |
| 235 | +}; |
| 236 | + |
| 237 | +&spi134 { |
| 238 | + status = "okay"; |
| 239 | + pinctrl-0 = <&spi134_default_test>; |
| 240 | + pinctrl-1 = <&spi134_sleep_test>; |
| 241 | + pinctrl-names = "default", "sleep"; |
| 242 | + overrun-character = <0x00>; |
| 243 | + memory-regions = <&cpuapp_dma_region>; |
| 244 | +}; |
| 245 | + |
| 246 | +&spi135 { |
| 247 | + status = "okay"; |
| 248 | + pinctrl-0 = <&spi135_default_test>; |
| 249 | + pinctrl-1 = <&spi135_sleep_test>; |
| 250 | + pinctrl-names = "default", "sleep"; |
| 251 | + overrun-character = <0x00>; |
| 252 | + memory-regions = <&cpuapp_dma_region>; |
| 253 | +}; |
| 254 | + |
| 255 | +/* spi136 inaccessible due to console on uart136 */ |
| 256 | + |
| 257 | +&spi137 { |
| 258 | + status = "okay"; |
| 259 | + pinctrl-0 = <&spi137_default_test>; |
| 260 | + pinctrl-1 = <&spi137_sleep_test>; |
| 261 | + pinctrl-names = "default", "sleep"; |
| 262 | + overrun-character = <0x00>; |
| 263 | + memory-regions = <&cpuapp_dma_region>; |
| 264 | +}; |
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