tests: benchmarks: idle_spim_loopback: reduce expected SPI xfers

SPIM120 with power management enabled has reduced performance
due to GD2/GD3 handling performed on each transfer.

Signed-off-by: Nikodem Kastelik <[email protected]>

Author: nika-nordic

tests/benchmarks/multicore/idle_spim_loopback/src/main.c

@@ -275,8 +275,8 @@ int main(void)
 		/* SPI was active for ~1 second with separate SPI CS activations
 		 * for each spi_transceive_dt() call.
 		 */
-		__ASSERT_NO_MSG(high >= 1000);
-		__ASSERT_NO_MSG(low >= 1000);
+		__ASSERT_NO_MSG(high >= 100);
+		__ASSERT_NO_MSG(low >= 100);
 		__ASSERT_NO_MSG(low == high);
 #endif
 		counter++;