1313#include <hal/nrf_power.h>
1414#elif defined(CONFIG_SOC_NRF5340_CPUAPP )
1515#include <hal/nrf_vmc.h>
16- #elif defined(CONFIG_SOC_NRF54L15_CPUAPP )
16+ #elif defined(CONFIG_SOC_SERIES_NRF54LX )
1717#include <hal/nrf_memconf.h>
1818#else
1919#error "RAM power-down library is not supported on the current platform"
@@ -47,6 +47,13 @@ static const struct ram_bank banks[] = {
4747 * the same bank.
4848 */
4949 { .start = 0x20000000UL , .section_count = 8 , .section_size = 0x8000 },
50+ #elif defined(CONFIG_SOC_NRF54L10_CPUAPP )
51+ /* Section numbers for RAM00 are 0-3 and for RAM01 are 4-5 within
52+ * the same bank.
53+ */
54+ { .start = 0x20000000UL , .section_count = 6 , .section_size = 0x8000 },
55+ #elif defined(CONFIG_SOC_NRF54L05_CPUAPP )
56+ { .start = 0x20000000UL , .section_count = 3 , .section_size = 0x8000 },
5057#elif defined(CONFIG_SOC_NRF52840 ) || defined(CONFIG_SOC_NRF52833 )
5158 { .start = 0x20000000UL , .section_count = 2 , .section_size = 0x1000 },
5259 { .start = 0x20002000UL , .section_count = 2 , .section_size = 0x1000 },
@@ -86,7 +93,7 @@ static void ram_bank_power_down(uint8_t bank_id, uint8_t first_section_id, uint8
8693 uint32_t mask = GENMASK (VMC_RAM_POWER_S0POWER_Pos + last_section_id ,
8794 VMC_RAM_POWER_S0POWER_Pos + first_section_id );
8895 nrf_vmc_ram_block_power_clear (NRF_VMC , bank_id , mask );
89- #elif defined(CONFIG_SOC_NRF54L15_CPUAPP )
96+ #elif defined(CONFIG_SOC_SERIES_NRF54LX )
9097 uint32_t mask = GENMASK (MEMCONF_POWER_CONTROL_MEM0_Pos + last_section_id ,
9198 MEMCONF_POWER_CONTROL_MEM0_Pos + first_section_id );
9299 nrf_memconf_ramblock_control_mask_enable_set (NRF_MEMCONF , bank_id , mask , false);
@@ -106,7 +113,7 @@ static void ram_bank_power_up(uint8_t bank_id, uint8_t first_section_id, uint8_t
106113 uint32_t mask = GENMASK (VMC_RAM_POWER_S0POWER_Pos + last_section_id ,
107114 VMC_RAM_POWER_S0POWER_Pos + first_section_id );
108115 nrf_vmc_ram_block_power_set (NRF_VMC , bank_id , mask );
109- #elif defined(CONFIG_SOC_NRF54L15_CPUAPP )
116+ #elif defined(CONFIG_SOC_SERIES_NRF54LX )
110117 uint32_t mask = GENMASK (MEMCONF_POWER_CONTROL_MEM0_Pos + last_section_id ,
111118 MEMCONF_POWER_CONTROL_MEM0_Pos + first_section_id );
112119 nrf_memconf_ramblock_control_mask_enable_set (NRF_MEMCONF , bank_id , mask , true);
0 commit comments