tests: zephyr: boards: nrf: comp: run on nRF54LM20 CSP

Aligned COMP test to nRF54LM20A PDK CSP.

Signed-off-by: Michał Stasiak <[email protected]>

Author: mstasiaknordic

tests/zephyr/boards/nrf/comp/Kconfig

@@ -0,0 +1,4 @@
+# Copyright (c) 2025, Nordic Semiconductor ASA
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+
+source "tests/boards/nrf/comp/Kconfig"

tests/zephyr/boards/nrf/comp/boards/nrf54lm20pdk_nrf54lm20a_cpuapp.conf

@@ -0,0 +1,4 @@
+CONFIG_TEST_COMP_SE_PSEL_AIN_INDEX=1
+CONFIG_TEST_COMP_SE_EXTREFSEL_AIN_INDEX=5
+CONFIG_TEST_COMP_DIFF_PSEL_AIN_INDEX=3
+CONFIG_TEST_COMP_DIFF_EXTREFSEL_AIN_INDEX=1

tests/zephyr/boards/nrf/comp/boards/nrf54lm20pdk_nrf54lm20a_cpuapp_0_2_0_csp.conf

@@ -0,0 +1,4 @@
+CONFIG_TEST_COMP_SE_PSEL_AIN_INDEX=1
+CONFIG_TEST_COMP_SE_EXTREFSEL_AIN_INDEX=4
+CONFIG_TEST_COMP_DIFF_PSEL_AIN_INDEX=6
+CONFIG_TEST_COMP_DIFF_EXTREFSEL_AIN_INDEX=5

tests/zephyr/boards/nrf/comp/boards/nrf54lm20pdk_nrf54lm20a_cpuapp_0_2_0_csp.overlay

@@ -1,8 +1,8 @@
 /* Two loopbacks are used
  * Each loopback is between analog input and GPIO.
- * first-gpios (P1.00) -> AIN3 (P1.29)
+ * first-gpios (P1.03) -> AIN6 (P1.04)
  * second-gpios (P1.30, AIN2) -> AIN1 (P1.31)
- * AIN5 (P1.05) tied to low (GND)
+ * AIN4 (P1.06) tied to VDD
  */
 
 / {
@@ -11,7 +11,7 @@
 	};
 
 	zephyr,user {
-		first-gpios = <&gpio1 0 GPIO_ACTIVE_HIGH>;
+		first-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
 		second-gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
 	};
 };

west.yml

@@ -65,7 +65,7 @@ manifest:
     # https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/zephyr/guides/modules.html
     - name: zephyr
       repo-path: sdk-zephyr
-      revision: 684fe9dd37d8e066b64a337d4b5ec4693ecee5cc
+      revision: dd5d9cf6b38e86ec3b6e7220e3b1fa4c057fdfad
       import:
         # In addition to the zephyr repository itself, NCS also
         # imports the contents of zephyr/west.yml at the above