drivers: mspi: Use TIMER peripheral as a watchdog for SDP FW

TIMER is set up by the Host and cleared periodically by SDP FW.
If SDP FW fails to clear the TIMER, the Host receives
an IRQ signalling an SDP FW error.

Signed-off-by: Jakub Zymelka <[email protected]>

Author: jaz1-nordic

drivers/mspi/Kconfig.nrfe

@@ -34,4 +34,22 @@ config MSPI_NRFE_IPC_NO_COPY
 	  this requires both cores to be able to access each others memory spaces.
 	  If n Data is passed through IPC by copy.
 
+config MSPI_NRFE_FAULT_TIMER
+	bool "SDP application fault timer"
+	select COUNTER
+	help
+	  Enable SDP application fault timer.
+	  Timer is used to detect application faults. If the timer expires,
+	  the application is considered to be in a fault state.
+
+if MSPI_NRFE_FAULT_TIMER
+
+config MSPI_NRFE_FAULT_TIMEOUT
+	int "SDP application fault timeout"
+	default 1000000
+	help
+	  Fault timeout in microseconds.
+
+endif # MSPI_NRFE_FAULT_TIMER
+
 endif # MSPI_NRFE

drivers/mspi/mspi_nrfe.c

@@ -9,6 +9,7 @@
 #include <zephyr/kernel.h>
 #include <zephyr/drivers/mspi.h>
 #include <zephyr/drivers/pinctrl.h>
+#include <zephyr/drivers/counter.h>
 #include <zephyr/ipc/ipc_service.h>
 #include <zephyr/pm/device.h>
 #if !defined(CONFIG_MULTITHREADING)
@@ -113,6 +114,16 @@ static void ep_recv(const void *data, size_t len, void *priv)
 	nrfe_mspi_flpr_response_msg_t *response = (nrfe_mspi_flpr_response_msg_t *)data;
 
 	switch (response->opcode) {
+#if defined(CONFIG_MSPI_NRFE_FAULT_TIMER)
+	case NRFE_MSPI_CONFIG_TIMER_PTR: {
+#if defined(CONFIG_MULTITHREADING)
+		k_sem_give(&ipc_sem);
+#else
+		atomic_set_bit(&ipc_atomic_sem, NRFE_MSPI_CONFIG_TIMER_PTR);
+#endif
+		break;
+	}
+#endif
 	case NRFE_MSPI_CONFIG_PINS: {
 #if defined(CONFIG_MULTITHREADING)
 		k_sem_give(&ipc_sem_cfg);
@@ -219,6 +230,9 @@ static int nrfe_mspi_wait_for_response(nrfe_mspi_opcode_t opcode, uint32_t timeo
 	int ret = 0;
 
 	switch (opcode) {
+	case NRFE_MSPI_CONFIG_TIMER_PTR:
+		ret = k_sem_take(&ipc_sem, K_MSEC(timeout));
+		break;
 	case NRFE_MSPI_CONFIG_PINS:
 	case NRFE_MSPI_CONFIG_DEV:
 	case NRFE_MSPI_CONFIG_XFER: {
@@ -633,6 +647,16 @@ static int dev_pm_action_cb(const struct device *dev, enum pm_device_action acti
 }
 #endif
 
+#if defined(CONFIG_MSPI_NRFE_FAULT_TIMER)
+static void flpr_fault_handler(const struct device *dev, void *user_data)
+{
+	ARG_UNUSED(dev);
+	ARG_UNUSED(user_data);
+
+	LOG_ERR("SDP fault detected.");
+}
+#endif
+
 /**
  * @brief Initialize the MSPI NRFE driver.
  *
@@ -655,6 +679,16 @@ static int nrfe_mspi_init(const struct device *dev)
 		.config = drv_cfg->mspicfg,
 	};
 
+#if defined(CONFIG_MSPI_NRFE_FAULT_TIMER)
+	const struct device *const flpr_fault_timer = DEVICE_DT_GET(DT_NODELABEL(fault_timer));
+	const struct counter_top_cfg top_cfg = {
+		.callback = flpr_fault_handler,
+		.user_data = NULL,
+		.flags = 0,
+		.ticks = counter_us_to_ticks(flpr_fault_timer, CONFIG_MSPI_NRFE_FAULT_TIMEOUT)
+	};
+#endif
+
 	ret = pinctrl_apply_state(drv_cfg->pcfg, PINCTRL_STATE_DEFAULT);
 	if (ret) {
 		return ret;
@@ -691,6 +725,40 @@ static int nrfe_mspi_init(const struct device *dev)
 		return ret;
 	}
 #endif
+
+#if defined(CONFIG_MSPI_NRFE_FAULT_TIMER)
+	/* Configure timer as SDP `watchdog` */
+	if (!device_is_ready(flpr_fault_timer)) {
+		LOG_ERR("FLPR timer not ready");
+		return -1;
+	}
+
+	ret = counter_set_top_value(flpr_fault_timer, &top_cfg);
+	if (ret < 0) {
+		LOG_ERR("counter_set_top_value() failure");
+		return ret;
+	}
+
+	/* Send timer address to FLPR */
+	nrfe_mspi_flpr_timer_msg_t timer_data = {
+		.opcode = NRFE_MSPI_CONFIG_TIMER_PTR,
+		.timer_ptr = (NRF_TIMER_Type *)DT_REG_ADDR(DT_NODELABEL(fault_timer)),
+	};
+
+	ret = send_data(NRFE_MSPI_CONFIG_TIMER_PTR, (const void *)&timer_data.opcode,
+			sizeof(nrfe_mspi_flpr_timer_msg_t));
+	if (ret < 0) {
+		LOG_ERR("Send timer configuration failure");
+		return ret;
+	}
+
+	ret = counter_start(flpr_fault_timer);
+	if (ret < 0) {
+		LOG_ERR("counter_start() failure");
+		return ret;
+	}
+#endif
+
 	return ret;
 }
 

include/drivers/mspi/nrfe_mspi.h

@@ -9,6 +9,7 @@
 
 #include <zephyr/drivers/pinctrl.h>
 #include <zephyr/drivers/mspi.h>
+#include <hal/nrf_timer.h>
 
 #ifdef __cplusplus
 extern "C" {
@@ -32,10 +33,11 @@ extern "C" {
 /** @brief eMSPI opcodes. */
 typedef enum {
 	NRFE_MSPI_EP_BOUNDED = 0,
-	NRFE_MSPI_CONFIG_PINS, /* nrfe_mspi_pinctrl_soc_pin_msg_t */
-	NRFE_MSPI_CONFIG_DEV,  /* nrfe_mspi_dev_config_msg_t */
-	NRFE_MSPI_CONFIG_XFER, /* nrfe_mspi_xfer_config_msg_t */
-	NRFE_MSPI_TX,	       /* nrfe_mspi_xfer_packet_msg_t + data buffer at the end */
+	NRFE_MSPI_CONFIG_TIMER_PTR, /* nrfe_mspi_flpr_timer_msg_t */
+	NRFE_MSPI_CONFIG_PINS,      /* nrfe_mspi_pinctrl_soc_pin_msg_t */
+	NRFE_MSPI_CONFIG_DEV,       /* nrfe_mspi_dev_config_msg_t */
+	NRFE_MSPI_CONFIG_XFER,      /* nrfe_mspi_xfer_config_msg_t */
+	NRFE_MSPI_TX,	            /* nrfe_mspi_xfer_packet_msg_t + data buffer at the end */
 	NRFE_MSPI_TXRX,
 	NRFE_MSPI_WRONG_OPCODE,
 	NRFE_MSPI_ALL_OPCODES = NRFE_MSPI_WRONG_OPCODE,
@@ -58,6 +60,11 @@ typedef struct {
 	uint16_t rx_dummy;
 } nrfe_mspi_xfer_config_t;
 
+typedef struct {
+	nrfe_mspi_opcode_t opcode; /* NRFE_MSPI_CONFIG_TIMER_PTR */
+	NRF_TIMER_Type *timer_ptr;
+} nrfe_mspi_flpr_timer_msg_t;
+
 typedef struct {
 	nrfe_mspi_opcode_t opcode; /* NRFE_MSPI_CONFIG_PINS */
 	pinctrl_soc_pin_t pin[NRFE_MSPI_PINS_MAX];