dts: common: nordic: add mramc nrf7120_enga.dtsi

add mram-controller node as wrapper for mram,
sysbuild build nvs controller to mram_controller
for nrf7120.

Signed-off-by: Travis Lam <[email protected]>

Author: travis3630

cmake/sysbuild/partition_manager.cmake

@@ -523,9 +523,13 @@ foreach(d APP ${PM_DOMAINS})
   endif()
 
   sysbuild_get(${image_name}_CONFIG_SOC_SERIES_NRF54LX IMAGE ${image_name} VAR CONFIG_SOC_SERIES_NRF54LX KCONFIG)
+  sysbuild_get(${image_name}_CONFIG_SOC_SERIES_NRF71X IMAGE ${image_name} VAR CONFIG_SOC_SERIES_NRF71X KCONFIG)
   if(${image_name}_CONFIG_SOC_SERIES_NRF54LX)
     set(soc_nvs_controller rram_controller)
     set(soc_nvs_controller_driver_kc CONFIG_SOC_FLASH_NRF_RRAM)
+  elseif(${image_name}_CONFIG_SOC_SERIES_NRF71X)
+    set(soc_nvs_controller mram_controller)
+    set(soc_nvs_controller_driver_kc CONFIG_SOC_FLASH_NRF_MRAMC)
   else()
     set(soc_nvs_controller flash_controller)
     set(soc_nvs_controller_driver_kc CONFIG_SOC_FLASH_NRF)

dts/common/nordic/nrf7120_enga.dtsi

@@ -125,20 +125,6 @@
 		};
 #endif
 
-		cpuapp_mram: mram@0 {
-			compatible = "nordic,mram";
-			reg = <0 DT_SIZE_K(3972)>;
-			erase-block-size = <4096>;
-			write-block-size = <4>;
-		};
-
-		cpuflpr_mram: mram@3e1000 {
-			compatible = "nordic,mram";
-			reg = <0x3e1000 DT_SIZE_K(116)>;
-			erase-block-size = <4096>;
-			write-block-size = <4>;
-		};
-
 		cpuapp_sram: memory@20000000 {
 			compatible = "mmio-sram";
 			reg = <0x20000000 DT_SIZE_K(512)>;
@@ -826,6 +812,28 @@
 				status = "disabled";
 			};
 
+			mram_controller: mram-controller@0x5004e000 {
+				compatible = "nordic,mram-controller";
+				reg = <0x5004e000 0x1000>;
+				#address-cells = <1>;
+				#size-cells = <1>;
+				interrupts = <78 NRF_DEFAULT_IRQ_PRIORITY>;
+
+				cpuapp_mram: mram@0 {
+					compatible = "nordic,mram";
+					reg = <0 DT_SIZE_K(3972)>;
+					erase-block-size = <4096>;
+					write-block-size = <4>;
+				};
+
+				cpuflpr_mram: mram@3e1000 {
+					compatible = "nordic,mram";
+					reg = <0x3e1000 DT_SIZE_K(116)>;
+					erase-block-size = <4096>;
+					write-block-size = <4>;
+				};
+			};
+
 			cpuapp_ppb: cpuapp-ppb-bus {
 				#address-cells = <1>;
 				#size-cells = <1>;