boards: nordic: nrf54lm20apdk: Add 0.2.0.csp board revision

Added board revision 0.2.0.csp with wider access to GPIOs
and changed pin assignement for UART20, LEDs and buttons.

Signed-off-by: Michał Stasiak <[email protected]>

Author: mstasiaknordic

boards/nordic/nrf54lm20apdk/board.yml

@@ -5,8 +5,9 @@ board:
   socs:
   - name: nrf54lm20a
   revision:
-    format: major.minor.patch
+    format: custom
     default: "0.0.0"
     revisions:
     - name: "0.0.0"
     - name: "0.2.0"
+    - name: "0.2.0.csp"

boards/nordic/nrf54lm20apdk/nrf54lm20apdk_nrf54lm20a_cpuapp_0_2_0_csp.overlay

@@ -0,0 +1,84 @@
+/*
+ * Copyright (c) 2025 Nordic Semiconductor ASA
+ *
+ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+ */
+
+/ {
+	leds {
+		compatible = "gpio-leds";
+
+		led0: led_0 {
+			gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+		};
+
+		led1: led_1 {
+			gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>;
+		};
+
+		led2: led_2 {
+			gpios = <&gpio1 27 GPIO_ACTIVE_HIGH>;
+		};
+
+		led3: led_3 {
+			gpios = <&gpio1 28 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	buttons {
+		compatible = "gpio-keys";
+
+		button0: button_0 {
+			gpios = <&gpio1 26 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+		};
+
+		button1: button_1 {
+			gpios = <&gpio1 9 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+		};
+
+		button2: button_2 {
+			gpios = <&gpio1 8 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+		};
+
+		button3: button_3 {
+			gpios = <&gpio0 5 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
+		};
+	};
+};
+
+&hfpll {
+	clock-frequency = <DT_FREQ_M(128)>;
+};
+
+&pinctrl {
+	/omit-if-no-ref/ uart20_default: uart20_default {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 1, 16)>;
+		};
+
+		group2 {
+			psels = <NRF_PSEL(UART_RX, 1, 17)>;
+			bias-pull-up;
+		};
+	};
+
+	/omit-if-no-ref/ uart20_sleep: uart20_sleep {
+		group1 {
+			psels = <NRF_PSEL(UART_TX, 1, 16)>,
+				<NRF_PSEL(UART_RX, 1, 17)>;
+			low-power-enable;
+		};
+	};
+	/omit-if-no-ref/ pwm20_default: pwm20_default {
+		group1 {
+			psels = <NRF_PSEL(PWM_OUT0, 1, 25)>;
+		};
+	};
+
+	/omit-if-no-ref/ pwm20_sleep: pwm20_sleep {
+		group1 {
+			psels = <NRF_PSEL(PWM_OUT0, 1, 25)>;
+			low-power-enable;
+		};
+	};
+};

boards/nordic/nrf54lm20apdk/nrf54lm20apdk_nrf54lm20a_cpuapp_0_2_0_csp.yaml

@@ -0,0 +1,23 @@
+# Copyright (c) 2025 Nordic Semiconductor ASA
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+
+identifier: [email protected]/nrf54lm20a/cpuapp
+name: nRF54LM20A-PDK-nRF54LM20A-Application (rev. 0.2.0.csp)
+type: mcu
+arch: arm
+toolchain:
+  - gnuarmemb
+  - zephyr
+sysbuild: true
+ram: 512
+flash: 449
+supported:
+  - adc
+  - counter
+  - dmic
+  - gpio
+  - i2c
+  - i2s
+  - pwm
+  - spi
+  - watchdog

boards/nordic/nrf54lm20apdk/revision.cmake

@@ -0,0 +1,11 @@
+# Copyright (c) 2025 Nordic Semiconductor ASA
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+
+set(REVISIONS "0.0.0" "0.2.0" "0.2.0.csp")
+if(NOT DEFINED BOARD_REVISION)
+  set(BOARD_REVISION "0.0.0")
+else()
+  if(NOT BOARD_REVISION IN_LIST REVISIONS)
+    message(FATAL_ERROR "${BOARD_REVISION} is not a valid nRF54LM20A PDK board revision. Accepted revisions: ${REVISIONS}")
+  endif()
+endif()