From 910468112e4addaf25c2ef662bdb74ab80d7b8f4 Mon Sep 17 00:00:00 2001 From: Michal Frankiewicz Date: Tue, 4 Mar 2025 16:16:11 +0100 Subject: [PATCH] applications: sdp: mspi: Dummy clocks in rx mode Iplemented Dummy clocks support for rx mode. Signed-off-by: Michal Frankiewicz --- applications/sdp/mspi/src/hrt/hrt-nrf54l15.s | 5 +++++ applications/sdp/mspi/src/hrt/hrt.c | 7 ++++++- applications/sdp/mspi/src/main.c | 15 +++++++++++++++ 3 files changed, 26 insertions(+), 1 deletion(-) diff --git a/applications/sdp/mspi/src/hrt/hrt-nrf54l15.s b/applications/sdp/mspi/src/hrt/hrt-nrf54l15.s index 1442265212a7..d80ef4f81528 100644 --- a/applications/sdp/mspi/src/hrt/hrt-nrf54l15.s +++ b/applications/sdp/mspi/src/hrt/hrt-nrf54l15.s @@ -487,6 +487,11 @@ hrt_read: li a2,0 addi a0,s0,20 call hrt_tx_rx.constprop.0 + lbu a1,82(s0) + lhu a3,84(s0) + li a2,0 + addi a0,s0,40 + call hrt_tx_rx.constprop.0 li a5,0 .L57: lw a4,64(s0) diff --git a/applications/sdp/mspi/src/hrt/hrt.c b/applications/sdp/mspi/src/hrt/hrt.c index 14cf6770f72f..3dfc8d01e100 100644 --- a/applications/sdp/mspi/src/hrt/hrt.c +++ b/applications/sdp/mspi/src/hrt/hrt.c @@ -12,7 +12,7 @@ #define SPI_INPUT_PIN_NUM 2 #define CNT1_INIT_VALUE 1 -#define MSB_MASK (0xff000000) +#define MSB_MASK (0xff000000) #define INPUT_SHIFT_COUNT (BITS_IN_WORD - BITS_IN_BYTE) @@ -314,6 +314,11 @@ void hrt_read(volatile hrt_xfer_t *hrt_xfer_params) hrt_tx_rx(&hrt_xfer_params->xfer_data[HRT_FE_ADDRESS], hrt_xfer_params->bus_widths.address, false, hrt_xfer_params->counter_value, CNT1_INIT_VALUE); + /* Transfer dummy_cycles */ + hrt_tx_rx(&hrt_xfer_params->xfer_data[HRT_FE_DUMMY_CYCLES], + hrt_xfer_params->bus_widths.dummy_cycles, false, hrt_xfer_params->counter_value, + CNT1_INIT_VALUE); + for (uint32_t i = 0; i < hrt_xfer_params->xfer_data[HRT_FE_DATA].word_count; i++) { hrt_xfer_params->xfer_data[HRT_FE_DATA].data[i] = nrf_vpr_csr_vio_in_buffered_reversed_byte_get() >> INPUT_SHIFT_COUNT; diff --git a/applications/sdp/mspi/src/main.c b/applications/sdp/mspi/src/main.c index 6799faf7c2c7..fddb5482de13 100644 --- a/applications/sdp/mspi/src/main.c +++ b/applications/sdp/mspi/src/main.c @@ -28,6 +28,8 @@ #define MAX_SHIFT_COUNT 63 +#define DUMMY_CYCLES_DATA 0x00000000 + #define CE_PIN_UNUSED UINT8_MAX #define HRT_IRQ_PRIORITY 2 @@ -260,9 +262,15 @@ static void xfer_execute(nrfe_mspi_xfer_packet_msg_t *xfer_packet) void prepare_and_read_data(nrfe_mspi_xfer_packet_msg_t *xfer_packet, volatile uint8_t *buffer) { + /* TODO: rx_dummy*bus_width must be divisible by 8, remove when SHIFTCNTB changing is done. + */ + NRFX_ASSERT((nrfe_mspi_xfer_config_ptr->rx_dummy * xfer_params.bus_widths.dummy_cycles % + 8) == 0); + volatile nrfe_mspi_dev_config_t *device = &nrfe_mspi_devices[nrfe_mspi_xfer_config_ptr->device_index]; nrf_vpr_csr_vio_config_t config; + uint32_t dummy_cycles_data = DUMMY_CYCLES_DATA; xfer_params.counter_value = 4; xfer_params.ce_vio = ce_vios[device->ce_index]; @@ -298,6 +306,13 @@ void prepare_and_read_data(nrfe_mspi_xfer_packet_msg_t *xfer_packet, volatile ui xfer_params.xfer_data[HRT_FE_ADDRESS].word_count = nrfe_mspi_xfer_config_ptr->address_length; + /* Configure dummy_cycles phase. */ + xfer_params.xfer_data[HRT_FE_DUMMY_CYCLES].fun_out = HRT_FUN_OUT_WORD; + xfer_params.xfer_data[HRT_FE_DUMMY_CYCLES].data = (uint8_t *)&dummy_cycles_data; + xfer_params.xfer_data[HRT_FE_DUMMY_CYCLES].word_count = + nrfe_mspi_xfer_config_ptr->rx_dummy * xfer_params.bus_widths.dummy_cycles / + BITS_IN_BYTE; + /* Configure data phase. */ xfer_params.xfer_data[HRT_FE_DATA].word_count = xfer_packet->num_bytes;