diff --git a/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/app_common.dtsi b/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/app_common.dtsi index 20df4aa3b0c6..3440d1090a35 100644 --- a/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/app_common.dtsi +++ b/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/app_common.dtsi @@ -65,18 +65,6 @@ }; }; -/* Define the necessary aliases for the MCUboot slots that will be used by the DFU transports. - * Due to the build system limitation, the allowed size of the application image (configured by - * the code partition DTS node) is incorrectly increased by the size allocated for the radio image. - */ -slot0_partition: &cpuapp_slot0_partition { - label = "image-0"; -}; - -slot1_partition: &cpuapp_slot1_partition { - label = "image-1"; -}; - secondary_app_partition: &cpuapp_slot1_partition {}; /* Remove the undefined property value from the disabled VPR cores to prevent build errors. */ diff --git a/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/images/mcuboot/app.overlay b/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/images/mcuboot/app.overlay index 6219102df240..fd91f4705b22 100644 --- a/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/images/mcuboot/app.overlay +++ b/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/images/mcuboot/app.overlay @@ -15,17 +15,6 @@ }; }; -/* Define the necessary aliases for the DTS partition nodes that contain the application and - * radio images. - */ -slot0_partition: &cpuapp_slot0_partition { - label = "image-0"; -}; - -slot1_partition: &cpuapp_slot1_partition { - label = "image-1"; -}; - /* Remove the undefined property value from the disabled VPR cores to prevent build errors. */ &cpuflpr_vpr { /delete-property/ source-memory; diff --git a/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/memory_map.dtsi b/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/memory_map.dtsi index e3c28a73fe7f..f86100073035 100644 --- a/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/memory_map.dtsi +++ b/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpuapp/memory_map.dtsi @@ -21,30 +21,33 @@ reg = <0x30000 DT_SIZE_K(24)>; }; - /* Due to the build system limitation, the allowed size of the application image - * (configured by the code partition DTS node) is incorrectly increased by the size - * allocated for the radio image. + /* When using merged slots, the definition of MCUboot slots is common for all + * images and points to the "merged" partition. */ - cpuapp_slot0_partition: partition@36000 { + slot0_partition: partition@36000 { reg = <0x36000 DT_SIZE_K(808)>; }; + cpuapp_slot0_partition: partition@36800 { + reg = <0x36800 DT_SIZE_K(586)>; + }; + cpurad_slot0_partition: partition@c9000 { - reg = <0xc9000 DT_SIZE_K(220)>; + reg = <0xc9000 (DT_SIZE_K(220) - 224)>; }; /* Partitions belonging to the MRAM_11 memory block. */ - /* Due to the build system limitation, the allowed size of the application image - * (configured by the code partition DTS node) is incorrectly increased by the size - * allocated for the radio image. - */ - cpuapp_slot1_partition: partition@100000 { + slot1_partition: partition@100000 { reg = <0x100000 DT_SIZE_K(808)>; }; + cpuapp_slot1_partition: partition@100800 { + reg = <0x100800 DT_SIZE_K(586)>; + }; + cpurad_slot1_partition: partition@193000 { - reg = <0x193000 DT_SIZE_K(220)>; + reg = <0x193000 (DT_SIZE_K(220) - 224)>; }; storage_partition: partition@1ca000 { diff --git a/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpurad/images/ipc_radio/app.overlay b/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpurad/images/ipc_radio/app.overlay index 640b10a81d82..6071badb7f3a 100644 --- a/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpurad/images/ipc_radio/app.overlay +++ b/applications/nrf_desktop/configuration/nrf54h20dk_nrf54h20_cpurad/images/ipc_radio/app.overlay @@ -6,12 +6,4 @@ #include "../../../nrf54h20dk_nrf54h20_cpuapp/memory_map.dtsi" -slot0_partition: &cpurad_slot0_partition { - label = "image-0"; -}; - -slot1_partition: &cpurad_slot1_partition { - label = "image-1"; -}; - secondary_app_partition: &cpurad_slot1_partition {}; diff --git a/cmake/sysbuild/mcuboot_nrf54h20.cmake b/cmake/sysbuild/mcuboot_nrf54h20.cmake index c8bd20a57b1f..a81c7805d9c2 100644 --- a/cmake/sysbuild/mcuboot_nrf54h20.cmake +++ b/cmake/sysbuild/mcuboot_nrf54h20.cmake @@ -9,6 +9,7 @@ if(SB_CONFIG_MCUBOOT_SIGN_MERGED_BINARY) set(MERGED_IMAGES_HEX "mcuboot_merged.hex") UpdateableImage_Get(images GROUP "DEFAULT") + check_image_boundaries("slot0_partition" "${images}") merge_images_nrf54h20(${MERGED_IMAGES_HEX} "${images}") # Since all bootloader-enabled images are merged, disable programming subimages. list(REMOVE_ITEM images "${DEFAULT_IMAGE}") @@ -19,6 +20,7 @@ if(SB_CONFIG_MCUBOOT_SIGN_MERGED_BINARY) UpdateableImage_Get(variants GROUP "VARIANT") if(variants) + check_image_boundaries("slot1_partition" "${variants}") merge_images_nrf54h20(${MERGED_IMAGES_SECONDARY_HEX} "${variants}") list(REMOVE_ITEM variants "mcuboot_secondary_app") disable_programming_nrf54h20("${variants}") diff --git a/cmake/sysbuild/sign_nrf54h20.cmake b/cmake/sysbuild/sign_nrf54h20.cmake index 97099da96e6e..94460beb169a 100644 --- a/cmake/sysbuild/sign_nrf54h20.cmake +++ b/cmake/sysbuild/sign_nrf54h20.cmake @@ -2,6 +2,47 @@ # # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause +function(check_image_boundaries merged_partition images) + # Predefine the MCUboot header size. + set(MCUBOOT_HEADER_SIZE 0x800) + + # Fetch merged slot details from the mcuboot image. + dt_chosen(flash_node TARGET mcuboot PROPERTY "zephyr,flash") + dt_nodelabel(slot_path TARGET mcuboot NODELABEL "${merged_partition}" REQUIRED) + dt_reg_addr(slot_addr TARGET mcuboot PATH ${slot_path}) + dt_reg_size(slot_size TARGET mcuboot PATH ${slot_path}) + + # Calculate boundaries of the usable area. + sysbuild_get(mcuboot_image_footer_size IMAGE mcuboot CACHE) + math(EXPR slot_max_addr "${slot_addr} + ${slot_size} - ${mcuboot_image_footer_size}" OUTPUT_FORMAT HEXADECIMAL) + math(EXPR slot_min_addr "${slot_addr} + ${MCUBOOT_HEADER_SIZE}" OUTPUT_FORMAT HEXADECIMAL) + + # Iterate over images and check that they fit in the merged slots. + foreach(image ${images}) + set(start_offset) + set(end_offset) + sysbuild_get(start_offset IMAGE ${image} VAR CONFIG_ROM_START_OFFSET + KCONFIG) + sysbuild_get(end_offset IMAGE ${image} VAR CONFIG_ROM_END_OFFSET + KCONFIG) + dt_chosen(code_flash TARGET ${image} PROPERTY "zephyr,code-partition") + dt_reg_addr(code_addr TARGET ${image} PATH ${code_flash}) + dt_reg_size(code_size TARGET ${image} PATH ${code_flash}) + + math(EXPR code_end_addr "${code_addr} + ${code_size} - ${end_offset}" OUTPUT_FORMAT HEXADECIMAL) + math(EXPR code_start_addr "${code_addr} + ${start_offset}" OUTPUT_FORMAT HEXADECIMAL) + + if((${code_end_addr} GREATER ${slot_max_addr}) OR + (${code_start_addr} LESS ${slot_min_addr})) + message(FATAL_ERROR "Variant image ${image} " + "(${code_start_addr}, ${code_end_addr}) " + "does not fit in the merged ${merged_partition} " + "(${slot_min_addr}, ${slot_max_addr})") + return() + endif() + endforeach() +endfunction() + function(merge_images_nrf54h20 output_artifact images) find_program(MERGEHEX mergehex.py HINTS ${ZEPHYR_BASE}/scripts/build/ NAMES mergehex NAMES_PER_DIR) @@ -206,10 +247,14 @@ function(mcuboot_sign_merged_nrf54h20 merged_hex main_image) SB_CONFIG_MCUBOOT_MODE_DIRECT_XIP) if(CONFIG_NCS_IS_VARIANT_IMAGE) set(slot_size ${slot1_size}) + set(slot_addr ${slot1_addr}) else() set(slot_size ${slot0_size}) + set(slot_addr ${slot0_addr}) endif() - set(imgtool_rom_command --rom-fixed ${code_addr}) + # Adjust start offset, based on the active slot and code partition address. + math(EXPR start_offset "${start_offset} + ${code_addr} - ${slot_addr}") + set(imgtool_rom_command --rom-fixed ${slot_addr}) else() message(FATAL_ERROR "Only Direct XIP MCUboot modes are supported.") return() @@ -218,7 +263,8 @@ function(mcuboot_sign_merged_nrf54h20 merged_hex main_image) # Basic 'imgtool sign' command with known image information. set(imgtool_sign ${PYTHON_EXECUTABLE} ${IMGTOOL} sign --version ${CONFIG_MCUBOOT_IMGTOOL_SIGN_VERSION} --header-size - ${start_offset} --slot-size ${slot_size} ${imgtool_rom_command}) + ${start_offset} --slot-size ${slot_size} --pad-header + ${imgtool_rom_command}) set(imgtool_args --align ${write_block_size} ${imgtool_args}) # Extensionless prefix of any output file. @@ -284,8 +330,8 @@ function(mcuboot_sign_merged_nrf54h20 merged_hex main_image) "${output}.signed.confirmed.hex" CACHE FILEPATH "Signed and confirmed kernel hex file" FORCE) list(APPEND imgtool_cmd COMMAND - ${imgtool_sign} ${imgtool_args} --pad --confirm ${merged_hex} - ${output}.signed.confirmed.hex) + ${imgtool_sign} ${imgtool_args} --pad --pad-header --confirm + ${merged_hex} ${output}.signed.confirmed.hex) endif() if(NOT "${keyfile_enc}" STREQUAL "") diff --git a/samples/dfu/ab/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/samples/dfu/ab/boards/nrf54h20dk_nrf54h20_cpuapp.overlay index af0e3a2720c9..33db389c9b8a 100644 --- a/samples/dfu/ab/boards/nrf54h20dk_nrf54h20_cpuapp.overlay +++ b/samples/dfu/ab/boards/nrf54h20dk_nrf54h20_cpuapp.overlay @@ -11,3 +11,5 @@ zephyr,boot-mode = &boot_request; }; }; + +secondary_app_partition: &cpuapp_slot1_partition {}; diff --git a/samples/dfu/ab/src/ab_utils.c b/samples/dfu/ab/src/ab_utils.c index d06fffe9db53..3362dfd37fdd 100644 --- a/samples/dfu/ab/src/ab_utils.c +++ b/samples/dfu/ab/src/ab_utils.c @@ -39,12 +39,18 @@ LOG_MODULE_DECLARE(ab_sample); #define SLOT_A_OFFSET FIXED_PARTITION_OFFSET(SLOT_A_PARTITION) #define SLOT_B_OFFSET FIXED_PARTITION_OFFSET(SLOT_B_PARTITION) +#define SLOT_A_SIZE FIXED_PARTITION_SIZE(SLOT_A_PARTITION) +#define SLOT_B_SIZE FIXED_PARTITION_SIZE(SLOT_B_PARTITION) #define SLOT_A_FLASH_AREA_ID FIXED_PARTITION_ID(SLOT_A_PARTITION) #define SLOT_B_FLASH_AREA_ID FIXED_PARTITION_ID(SLOT_B_PARTITION) -#define IS_SLOT_A (CODE_PARTITION_OFFSET == SLOT_A_OFFSET) -#define IS_SLOT_B (CODE_PARTITION_OFFSET == SLOT_B_OFFSET) +#define IS_SLOT_A \ + (CODE_PARTITION_OFFSET >= SLOT_A_OFFSET && \ + CODE_PARTITION_OFFSET < SLOT_A_OFFSET + SLOT_A_SIZE) +#define IS_SLOT_B \ + (CODE_PARTITION_OFFSET >= SLOT_B_OFFSET && \ + CODE_PARTITION_OFFSET < SLOT_B_OFFSET + SLOT_B_SIZE) #endif /* CONFIG_PARTITION_MANAGER_ENABLED */ diff --git a/samples/zephyr/smp_svr_mini_boot/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/samples/dfu/ab/sysbuild/ipc_radio.overlay similarity index 52% rename from samples/zephyr/smp_svr_mini_boot/boards/nrf54h20dk_nrf54h20_cpuapp.overlay rename to samples/dfu/ab/sysbuild/ipc_radio.overlay index e7aabc746b40..b5f9df923418 100644 --- a/samples/zephyr/smp_svr_mini_boot/boards/nrf54h20dk_nrf54h20_cpuapp.overlay +++ b/samples/dfu/ab/sysbuild/ipc_radio.overlay @@ -4,4 +4,6 @@ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause */ -#include "../sysbuild/nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi" +#include "nrf54h20dk_nrf54h20_memory_map.dtsi" + +secondary_app_partition: &cpurad_slot1_partition {}; diff --git a/samples/dfu/ab/sysbuild/nrf54h20dk_nrf54h20_memory_map.dtsi b/samples/dfu/ab/sysbuild/nrf54h20dk_nrf54h20_memory_map.dtsi index 30efd3fbe45a..3aa133effe69 100644 --- a/samples/dfu/ab/sysbuild/nrf54h20dk_nrf54h20_memory_map.dtsi +++ b/samples/dfu/ab/sysbuild/nrf54h20dk_nrf54h20_memory_map.dtsi @@ -5,14 +5,59 @@ */ /* On nRF54H20 the Direct XIP mode is supported in the merged slot configuration - * Merge application and radio slots by extending the application partition. + * Extend slot0_partition and slot1_partition to cover both application and + * radio images, as well as MCUboot image metadata (header and trailer). + * Those partitions will be used by MCUboot to verify the merged image to boot. + * Apart from that, they will be used by the MCUmgr subsystem to correctly + * handle flags, stored inside the MCUboot image trailer. + * Use cpu_slot<0|1>_partition as zephyr,code-partition, so the + * application and radio sizes are correctly reported. */ -&cpuapp_slot0_partition { - reg = <0x40000 DT_SIZE_K(656)>; -}; +/delete-node/&cpuapp_slot0_partition; +/delete-node/&cpuapp_slot1_partition; +/delete-node/&cpurad_slot0_partition; +/delete-node/&cpurad_slot1_partition; + +&mram1x { + partitions { + /* Merged partition used by the MCUboot (variant 0). */ + slot0_partition: partition@40000 { + reg = <0x40000 DT_SIZE_K(656)>; + }; + + /* Application code partition (variant 0). + * Offset by the MCUboot header size (2048 bytes). + */ + cpuapp_slot0_partition: partition@40800 { + reg = <0x40800 DT_SIZE_K(326)>; + }; + + /* Radio code partition (variant 0). + * Reduced by the MCUboot trailer size (224 bytes). + */ + cpurad_slot0_partition: partition@92000 { + reg = <0x92000 (DT_SIZE_K(328) - 224)>; + }; -&cpuapp_slot1_partition { - reg = <0x100000 DT_SIZE_K(656)>; + /* Merged partition used by the MCUboot (variant 1). */ + slot1_partition: partition@100000 { + reg = <0x100000 DT_SIZE_K(656)>; + }; + + /* Application code partition (variant 1). + * Offset by the MCUboot header size (2048 bytes). + */ + cpuapp_slot1_partition: partition@100800 { + reg = <0x100800 DT_SIZE_K(326)>; + }; + + /* Radio code partition (variant 1). + * Reduced by the MCUboot trailer size (224 bytes). + */ + cpurad_slot1_partition: partition@152000 { + reg = <0x152000 (DT_SIZE_K(328) - 224)>; + }; + }; }; / { diff --git a/samples/zephyr/smp_svr_mini_boot/boards/nrf54h20dk_nrf54h20_cpuapp_direct_xip.overlay b/samples/zephyr/smp_svr_mini_boot/boards/nrf54h20dk_nrf54h20_cpuapp_direct_xip.overlay new file mode 100644 index 000000000000..293a95ef326f --- /dev/null +++ b/samples/zephyr/smp_svr_mini_boot/boards/nrf54h20dk_nrf54h20_cpuapp_direct_xip.overlay @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#include "../sysbuild/nrf54h20dk_nrf54h20_memory_map_direct_xip.dtsi" + +secondary_app_partition: &cpuapp_slot1_partition {}; diff --git a/samples/zephyr/smp_svr_mini_boot/sample.yaml b/samples/zephyr/smp_svr_mini_boot/sample.yaml index 2d9dd0941df8..cc065a3d2b6d 100644 --- a/samples/zephyr/smp_svr_mini_boot/sample.yaml +++ b/samples/zephyr/smp_svr_mini_boot/sample.yaml @@ -13,6 +13,7 @@ common: tests: sample.smp_svr_mini_boot: extra_args: + - FILE_SUFFIX="direct_xip" - SB_CONFIG_MCUBOOT_MODE_DIRECT_XIP=y platform_allow: - nrf54l15dk/nrf54l15/cpuapp diff --git a/samples/zephyr/smp_svr_mini_boot/sysbuild/ipc_radio_direct_xip.overlay b/samples/zephyr/smp_svr_mini_boot/sysbuild/ipc_radio_direct_xip.overlay new file mode 100644 index 000000000000..0603a27bea2f --- /dev/null +++ b/samples/zephyr/smp_svr_mini_boot/sysbuild/ipc_radio_direct_xip.overlay @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#include "nrf54h20dk_nrf54h20_memory_map_direct_xip.dtsi" + +secondary_app_partition: &cpurad_slot1_partition {}; diff --git a/samples/zephyr/smp_svr_mini_boot/sysbuild/mcuboot/boards/nrf54h20dk_nrf54h20_cpuapp.overlay b/samples/zephyr/smp_svr_mini_boot/sysbuild/mcuboot/boards/nrf54h20dk_nrf54h20_cpuapp_direct_xip.overlay similarity index 73% rename from samples/zephyr/smp_svr_mini_boot/sysbuild/mcuboot/boards/nrf54h20dk_nrf54h20_cpuapp.overlay rename to samples/zephyr/smp_svr_mini_boot/sysbuild/mcuboot/boards/nrf54h20dk_nrf54h20_cpuapp_direct_xip.overlay index f179ff7f987a..31ba803845dc 100644 --- a/samples/zephyr/smp_svr_mini_boot/sysbuild/mcuboot/boards/nrf54h20dk_nrf54h20_cpuapp.overlay +++ b/samples/zephyr/smp_svr_mini_boot/sysbuild/mcuboot/boards/nrf54h20dk_nrf54h20_cpuapp_direct_xip.overlay @@ -4,7 +4,7 @@ * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause */ -#include "../../nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi" +#include "../../nrf54h20dk_nrf54h20_memory_map_direct_xip.dtsi" / { chosen { diff --git a/samples/zephyr/smp_svr_mini_boot/sysbuild/nrf54h20dk_nrf54h20_memory_map_direct_xip.dtsi b/samples/zephyr/smp_svr_mini_boot/sysbuild/nrf54h20dk_nrf54h20_memory_map_direct_xip.dtsi new file mode 100644 index 000000000000..1e0b16ba3ed9 --- /dev/null +++ b/samples/zephyr/smp_svr_mini_boot/sysbuild/nrf54h20dk_nrf54h20_memory_map_direct_xip.dtsi @@ -0,0 +1,61 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +/* On nRF54H20 the Direct XIP mode is supported in the merged slot configuration + * Extend slot0_partition and slot1_partition to cover both application and + * radio images, as well as MCUboot image metadata (header and trailer). + * Those partitions will be used by MCUboot to verify the merged image to boot. + * Apart from that, they will be used by the MCUmgr subsystem to correctly + * handle flags, stored inside the MCUboot image trailer. + * Use cpu_slot<0|1>_partition as zephyr,code-partition, so the + * application and radio sizes are correctly reported. + */ +/delete-node/&cpuapp_slot0_partition; +/delete-node/&cpuapp_slot1_partition; +/delete-node/&cpurad_slot0_partition; +/delete-node/&cpurad_slot1_partition; + +&mram1x { + partitions { + /* Merged partition used by the MCUboot (variant 0). */ + slot0_partition: partition@40000 { + reg = <0x40000 DT_SIZE_K(656)>; + }; + + /* Application code partition (variant 0). + * Offset by the MCUboot header size (2048 bytes). + */ + cpuapp_slot0_partition: partition@40800 { + reg = <0x40800 DT_SIZE_K(326)>; + }; + + /* Radio code partition (variant 0). + * Reduced by the MCUboot trailer size (224 bytes). + */ + cpurad_slot0_partition: partition@92000 { + reg = <0x92000 (DT_SIZE_K(328) - 224)>; + }; + + /* Merged partition used by the MCUboot (variant 1). */ + slot1_partition: partition@100000 { + reg = <0x100000 DT_SIZE_K(656)>; + }; + + /* Application code partition (variant 1). + * Offset by the MCUboot header size (2048 bytes). + */ + cpuapp_slot1_partition: partition@100800 { + reg = <0x100800 DT_SIZE_K(326)>; + }; + + /* Radio code partition (variant 1). + * Reduced by the MCUboot trailer size (224 bytes). + */ + cpurad_slot1_partition: partition@152000 { + reg = <0x152000 (DT_SIZE_K(328) - 224)>; + }; + }; +}; diff --git a/samples/zephyr/smp_svr_mini_boot/sysbuild/nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi b/samples/zephyr/smp_svr_mini_boot/sysbuild/nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi deleted file mode 100644 index ab153f7b438e..000000000000 --- a/samples/zephyr/smp_svr_mini_boot/sysbuild/nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (c) 2025 Nordic Semiconductor ASA - * - * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause - */ - -/* On nRF54H20 the Direct XIP mode is supported in the merged slot configuration - * Merge application and radio slots by extending the application parition. - */ -&cpuapp_slot0_partition { - reg = <0x40000 DT_SIZE_K(656)>; -}; - -&cpuapp_slot1_partition { - reg = <0x100000 DT_SIZE_K(656)>; -}; diff --git a/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/boards/nrf54h20dk_nrf54h20_cpuapp_merged_slot.overlay b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/boards/nrf54h20dk_nrf54h20_cpuapp_merged_slot.overlay index e7aabc746b40..7e084c296458 100644 --- a/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/boards/nrf54h20dk_nrf54h20_cpuapp_merged_slot.overlay +++ b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/boards/nrf54h20dk_nrf54h20_cpuapp_merged_slot.overlay @@ -5,3 +5,5 @@ */ #include "../sysbuild/nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi" + +secondary_app_partition: &cpuapp_slot1_partition {}; diff --git a/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/boards/nrf54h20dk_nrf54h20_cpuapp_requests.overlay b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/boards/nrf54h20dk_nrf54h20_cpuapp_requests.overlay index 4cb253a13f44..5d190ae9d441 100644 --- a/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/boards/nrf54h20dk_nrf54h20_cpuapp_requests.overlay +++ b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/boards/nrf54h20dk_nrf54h20_cpuapp_requests.overlay @@ -11,3 +11,5 @@ zephyr,boot-mode = &boot_request; }; }; + +secondary_app_partition: &cpuapp_slot1_partition {}; diff --git a/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/ipc_radio_merged_slot.overlay b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/ipc_radio_merged_slot.overlay new file mode 100644 index 000000000000..3bb10e06b9fa --- /dev/null +++ b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/ipc_radio_merged_slot.overlay @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#include "nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi" + +secondary_app_partition: &cpurad_slot1_partition {}; diff --git a/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/ipc_radio_requests.overlay b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/ipc_radio_requests.overlay new file mode 100644 index 000000000000..e4dfbb0f9b1d --- /dev/null +++ b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/ipc_radio_requests.overlay @@ -0,0 +1,9 @@ +/* + * Copyright (c) 2025 Nordic Semiconductor ASA + * + * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause + */ + +#include "nrf54h20dk_nrf54h20_memory_map_requests.dtsi" + +secondary_app_partition: &cpurad_slot1_partition {}; diff --git a/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi index ab153f7b438e..1e0b16ba3ed9 100644 --- a/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi +++ b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/nrf54h20dk_nrf54h20_memory_map_merged_slot.dtsi @@ -5,12 +5,57 @@ */ /* On nRF54H20 the Direct XIP mode is supported in the merged slot configuration - * Merge application and radio slots by extending the application parition. + * Extend slot0_partition and slot1_partition to cover both application and + * radio images, as well as MCUboot image metadata (header and trailer). + * Those partitions will be used by MCUboot to verify the merged image to boot. + * Apart from that, they will be used by the MCUmgr subsystem to correctly + * handle flags, stored inside the MCUboot image trailer. + * Use cpu_slot<0|1>_partition as zephyr,code-partition, so the + * application and radio sizes are correctly reported. */ -&cpuapp_slot0_partition { - reg = <0x40000 DT_SIZE_K(656)>; -}; +/delete-node/&cpuapp_slot0_partition; +/delete-node/&cpuapp_slot1_partition; +/delete-node/&cpurad_slot0_partition; +/delete-node/&cpurad_slot1_partition; + +&mram1x { + partitions { + /* Merged partition used by the MCUboot (variant 0). */ + slot0_partition: partition@40000 { + reg = <0x40000 DT_SIZE_K(656)>; + }; + + /* Application code partition (variant 0). + * Offset by the MCUboot header size (2048 bytes). + */ + cpuapp_slot0_partition: partition@40800 { + reg = <0x40800 DT_SIZE_K(326)>; + }; + + /* Radio code partition (variant 0). + * Reduced by the MCUboot trailer size (224 bytes). + */ + cpurad_slot0_partition: partition@92000 { + reg = <0x92000 (DT_SIZE_K(328) - 224)>; + }; + + /* Merged partition used by the MCUboot (variant 1). */ + slot1_partition: partition@100000 { + reg = <0x100000 DT_SIZE_K(656)>; + }; + + /* Application code partition (variant 1). + * Offset by the MCUboot header size (2048 bytes). + */ + cpuapp_slot1_partition: partition@100800 { + reg = <0x100800 DT_SIZE_K(326)>; + }; -&cpuapp_slot1_partition { - reg = <0x100000 DT_SIZE_K(656)>; + /* Radio code partition (variant 1). + * Reduced by the MCUboot trailer size (224 bytes). + */ + cpurad_slot1_partition: partition@152000 { + reg = <0x152000 (DT_SIZE_K(328) - 224)>; + }; + }; }; diff --git a/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/nrf54h20dk_nrf54h20_memory_map_requests.dtsi b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/nrf54h20dk_nrf54h20_memory_map_requests.dtsi index 72b049e71111..3aa133effe69 100644 --- a/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/nrf54h20dk_nrf54h20_memory_map_requests.dtsi +++ b/samples/zephyr/subsys/mgmt/mcumgr/smp_svr/sysbuild/nrf54h20dk_nrf54h20_memory_map_requests.dtsi @@ -5,14 +5,59 @@ */ /* On nRF54H20 the Direct XIP mode is supported in the merged slot configuration - * Merge application and radio slots by extending the application parition. + * Extend slot0_partition and slot1_partition to cover both application and + * radio images, as well as MCUboot image metadata (header and trailer). + * Those partitions will be used by MCUboot to verify the merged image to boot. + * Apart from that, they will be used by the MCUmgr subsystem to correctly + * handle flags, stored inside the MCUboot image trailer. + * Use cpu_slot<0|1>_partition as zephyr,code-partition, so the + * application and radio sizes are correctly reported. */ -&cpuapp_slot0_partition { - reg = <0x40000 DT_SIZE_K(656)>; -}; +/delete-node/&cpuapp_slot0_partition; +/delete-node/&cpuapp_slot1_partition; +/delete-node/&cpurad_slot0_partition; +/delete-node/&cpurad_slot1_partition; + +&mram1x { + partitions { + /* Merged partition used by the MCUboot (variant 0). */ + slot0_partition: partition@40000 { + reg = <0x40000 DT_SIZE_K(656)>; + }; + + /* Application code partition (variant 0). + * Offset by the MCUboot header size (2048 bytes). + */ + cpuapp_slot0_partition: partition@40800 { + reg = <0x40800 DT_SIZE_K(326)>; + }; + + /* Radio code partition (variant 0). + * Reduced by the MCUboot trailer size (224 bytes). + */ + cpurad_slot0_partition: partition@92000 { + reg = <0x92000 (DT_SIZE_K(328) - 224)>; + }; -&cpuapp_slot1_partition { - reg = <0x100000 DT_SIZE_K(656)>; + /* Merged partition used by the MCUboot (variant 1). */ + slot1_partition: partition@100000 { + reg = <0x100000 DT_SIZE_K(656)>; + }; + + /* Application code partition (variant 1). + * Offset by the MCUboot header size (2048 bytes). + */ + cpuapp_slot1_partition: partition@100800 { + reg = <0x100800 DT_SIZE_K(326)>; + }; + + /* Radio code partition (variant 1). + * Reduced by the MCUboot trailer size (224 bytes). + */ + cpurad_slot1_partition: partition@152000 { + reg = <0x152000 (DT_SIZE_K(328) - 224)>; + }; + }; }; / { diff --git a/subsys/bootloader/Kconfig b/subsys/bootloader/Kconfig index f2f9d5e4f02a..163752667869 100644 --- a/subsys/bootloader/Kconfig +++ b/subsys/bootloader/Kconfig @@ -170,4 +170,9 @@ config MCUBOOT_BOOTLOADER_SIGNATURE_TYPE_PURE help This is a Kconfig which is informative only, the value should not be changed. +config NCS_MCUBOOT_BOOTLOADER_SIGN_MERGED_BINARY + bool "Sign merged binary instead of individual images" + help + This is a Kconfig which is informative only, the value should not be changed. + endmenu diff --git a/sysbuild/CMakeLists.txt b/sysbuild/CMakeLists.txt index 0a0118ce43ff..a0d6fc8fb9d7 100644 --- a/sysbuild/CMakeLists.txt +++ b/sysbuild/CMakeLists.txt @@ -693,6 +693,8 @@ function(${SYSBUILD_CURRENT_MODULE_NAME}_pre_cmake) if(SB_CONFIG_MCUBOOT_SIGN_MERGED_BINARY AND SB_CONFIG_SOC_NRF54H20) UpdateableImage_Get(images ALL) foreach(image ${images}) + set_config_bool(${image} CONFIG_NCS_MCUBOOT_BOOTLOADER_SIGN_MERGED_BINARY + true) set(${image}_SIGNING_SCRIPT "${ZEPHYR_NRF_MODULE_DIR}/cmake/sysbuild/image_signing_nrf54h20.cmake" CACHE INTERNAL "MCUboot signing script" FORCE) diff --git a/west.yml b/west.yml index 5c06bfe1c7ea..2c0bde2678d8 100644 --- a/west.yml +++ b/west.yml @@ -65,7 +65,7 @@ manifest: # https://developer.nordicsemi.com/nRF_Connect_SDK/doc/latest/zephyr/guides/modules.html - name: zephyr repo-path: sdk-zephyr - revision: 69ad0523f95f13d1de356c19575301ce3de4959e + revision: pull/3310/head import: # In addition to the zephyr repository itself, NCS also # imports the contents of zephyr/west.yml at the above @@ -128,7 +128,7 @@ manifest: compare-by-default: true - name: mcuboot repo-path: sdk-mcuboot - revision: 85349537b3bc4e8e9e7542abd0303adf28177dcb + revision: pull/538/head path: bootloader/mcuboot - name: qcbor url: https://github.com/laurencelundblade/QCBOR