doc: doc review p1 build fix

made some small initial changes
added the missing ref

Signed-off-by: Anna Wojdylo <[email protected]>

Author: annwoj

softperipheral/CHANGELOG.rst

@@ -15,13 +15,13 @@ nRF Connect SDK v3.2.0
 This version contains an initial release of the Soft Peripheral sEMMC.
 See the following list of changes:
 
-
 * Added:
 
   * The first implementation of Soft Peripheral sEMMC for nRF54H Series and nRF54L Series SoCs.
     For details, see the :ref:`semmc_changelog` page.
 
-  * New virtual register for sQSPI. Updates sQSPI to version 1.2.0. Now supports the nRF54LM20 device.
+  * New virtual register for sQSPI.
+    It updates sQSPI to version 1.2.0 and also supports the nRF54LM20 device.
     For details, see the :ref:`sqspi_changelog` page.
 
 nRF Connect SDK v3.1.0

softperipheral/doc/introduction.rst

@@ -46,22 +46,22 @@ The following table shows which soft peripherals and their versions are supporte
      - - nRF54L Series SoCs
        - nRF54H Series SoCs
      - - nRF54L15 SoC:
-          - v0.1.0 with NCS v3.0.0
-          - v1.0.0 with NCS v3.1.0
-          - v1.1.0 with NCS v3.1.0
-          - v1.2.0 with NCS v3.2.0
+          - v0.1.0 with the NCS v3.0.0
+          - v1.0.0 with the NCS v3.1.0
+          - v1.1.0 with the NCS v3.1.0
+          - v1.2.0 with the NCS v3.2.0
        - nRF54LM20 SoC:
-          - v1.2.0 with NCS v3.2.0
+          - v1.2.0 with the NCS v3.2.0
        - nRF54H20 SoC:
-          - v0.1.0 with NCS v3.0.0
-          - v1.1.0 with NCS v3.1.0
-          - v1.2.0 with NCS v3.2.0
+          - v0.1.0 with the NCS v3.0.0
+          - v1.1.0 with the NCS v3.1.0
+          - v1.2.0 with the NCS v3.2.0
    * - sEMMC
      - - nRF54L Series SoCs
        - nRF54H Series SoCs
      - - nRF54L15 SoC:
-          - v0.1.0 with NCS v3.2.0
+          - v0.1.0 with the NCS v3.2.0
        - nRF54LM20 SoC:
-          - v0.1.0 with NCS v3.2.0
+          - v0.1.0 with the NCS v3.2.0
        - nRF54H20 SoC:
-          - v0.1.0 with NCS v3.2.0
+          - v0.1.0 with the NCS v3.2.0

softperipheral/doc/sEMMC/CHANGELOG.rst

@@ -7,21 +7,22 @@ sEMMC changelog
    :local:
    :depth: 2
 
-All the notable changes to sEMMC are documented on this page. Refer to :ref:`intro_soft_peripherals_platform_support` for supported Nordic devices for each version.
+All the notable changes to sEMMC are documented on this page.
+Refer to :ref:`intro_soft_peripherals_platform_support` for supported Nordic devices for each version.
 
 v0.1.0
 ******
 
 This is an initial release.
 
-* Added the following for the nRF54H Series and nRF54L Series devices:
+* Added the following support for the nRF54H Series and nRF54L Series devices:
 
-  * 1-lane and 4-lane data transmission support
-  * Support for Class 0 commands - Basic
-  * Support for Class 2 commands - Block read
-  * Support for Class 4 commands - Block write
-  * Support for Class 5 commands - Erase
-  * Support for Class 6 commands - Write protection
-  * Support for Class 7 commands - Lock device
-  * Support for Class 11 commands - Command queuing
-  * Support for all response types
+  * 1-lane and 4-lane data transmission
+  * Class 0 commands - Basic
+  * Class 2 commands - Block read
+  * Class 4 commands - Block write
+  * Class 5 commands - Erase
+  * Class 6 commands - Write protection
+  * Class 7 commands - Lock device
+  * Class 11 commands - Command queuing
+  * All response types

softperipheral/doc/sEMMC/README.rst

@@ -7,7 +7,7 @@ sEMMC
    :local:
    :depth: 2
 
-This documentation outlines the soft peripheral sEMMC.
+This documentation outlines the sEMMC Soft Peripheral.
 It covers setup, integration, and operational guidelines for using sEMMC through the nrfx driver API, alongside detailed descriptions of limitations and performance considerations.
 
 .. note::

softperipheral/doc/sEMMC/features.rst

@@ -7,7 +7,7 @@ sEMMC features
    :local:
    :depth: 2
 
-This page provides an overview of the functionalities and configurations available for the soft peripheral sEMMC for the current state of development.
+This page provides an overview of the functionalities and configurations available for the Soft Peripheral sEMMC for the current state of development.
 See the following sections for more details.
 
 .. _semmc_features_command_support:
@@ -28,13 +28,14 @@ sEMMC supports the following JEDEC Standard No. 84-B51A command groups:
 .. note::
    Refer to the :file:`nrf_semmc.h` header for a list of supported commands.
 
-
 .. _semmc_features_hs200_mode:
 
 HS200 mode support
 ******************
 
-sEMMC supports the HS200 mode for high-speed transfers. This allows sEMMC to operate at frequencies up to 80MHz on the nRF54H20 device.
+sEMMC supports the HS200 mode for high-speed transfers.
+This allows sEMMC to operate at frequencies up to 80MHz on the nRF54H20 device.
 
 .. note::
-   A tuning cycle using CMD21 might be necessary to find the optimal sampling point for reads. After doing a tuning cycle, apply the sampling value to :c:var:`nrf_semmc_config_t.read_delay`.
+   You need to perform a tuning cycle using CMD21 to find the optimal sampling point for reads.
+   After completing the tuning cycle, set the sampling value in the :c:var:`nrf_semmc_config_t.read_delay` variable.

softperipheral/doc/sQSPI/CHANGELOG.rst

@@ -7,7 +7,8 @@ sQSPI changelog
    :local:
    :depth: 2
 
-All the notable changes to sQSPI are documented on this page. Refer to :ref:`intro_soft_peripherals_platform_support` for supported devices for each version.
+All the notable changes to sQSPI are documented on this page.
+Refer to :ref:`intro_soft_peripherals_platform_support` for supported devices for each version.
 
 v1.2.0
 ******

softperipheral/doc/sQSPI/sqspi_nrf54H_series_porting_v1_2_0.rst

@@ -214,7 +214,7 @@ GPIO multiplexing must be handled by setting the correct ``CTRLSEL`` value in UI
 Additionally, the sQSPI application requires FastPad bias configuration to run at high frequency on SCLK.
 
 Any conflicting peripherals and existing memory partitions on the same port as sQSPI must be disabled in the overlay depending on your needs.
-An example code snippet of a devicetree overlay to give FLPR access to the pins on port P7 follows below. First in the snippet, the `pinctrl` block 
+An example code snippet of a devicetree overlay to give FLPR access to the pins on port P7 follows below. First in the snippet, the `pinctrl` block
 does GPIO configuration, setting up the pins as described in :ref:`sqspi_nrf54h_series_porting_guide_gpio_config`.
 The `cpuflpr_vpr` block and the following block will do the memory partitioning of VPR and the RAM used by sQSPI.
 
@@ -312,7 +312,7 @@ You will need the following lines in your application to apply the pin configura
    // The following line initializes sQSPI
    static nrf_sqpsi_t m_sqspi = {.p_reg = (void *)SP_REGIF_BASE, .drv_inst_idx = 0};
 
-
+.. _nrf54h20_porting_guide_ram_configuration:
 .. _nrf54H_series_porting_guide_ram_configuration:
 
 RAM configuration
@@ -359,7 +359,7 @@ For nRF54H Series devices the firmware has been tested with values after the con
 IRQ connection
 **************
 
-For sQSPI to communicate with the application core, the sQSPI IRQ handler must be registered. 
+For sQSPI to communicate with the application core, the sQSPI IRQ handler must be registered.
 The following code line registers the IRQ handler to FLPR:
 
 .. code-block:: c

softperipheral/doc/sQSPI/sqspi_nrf54L_series_porting_v1_2_0.rst

@@ -432,6 +432,7 @@ Assuming there is an access to the peripheral ``MEMCONF``, the following code sn
     nrf_qspi_activate(&m_qspi);
     nrf_memconf_ramblock_ret_enable_set(NRF_MEMCONF, 1, MEMCONF_POWER_RET_MEM0_Pos, false);
 
+.. _nrf54l15_porting_guide_ram_configuration:
 .. _nrf54L_series_porting_guide_ram_configuration:
 
 RAM configuration