doc: review p3 nrf54l

Reviewed docs for sEMMC peripheral for nRF54L
made small adjustments to sQSPI

Signed-off-by: Anna Wojdylo <[email protected]>

Author: annwoj

softperipheral/doc/sEMMC/semmc_nrf54H_series_porting_v0_1_0.rst

@@ -149,7 +149,7 @@ You must address these cases on the sEMMC application code.
 
 .. note::
    When using a custom PCB with the nRF54H20 device you might need to match the output impedance on the port you are using.
-   Refer to the :ref:`ug_nrf54h20_custom_pcb` page for details.
+   Refer to the :ref:`nrf:ug_nrf54h20_custom_pcb` page for details.
 
 GPIO multiplexing must be handled by setting the correct ``CTRLSEL`` value in UICR.
 

softperipheral/doc/sEMMC/semmc_nrf54L_series_porting_v0_1_0.rst

@@ -40,12 +40,13 @@ This structure shows the relevant files and directories in the `sdk-nrfxlib`_ re
               └── nrf_semmc.c
 
 .. note::
-   The main interface for sEMMC is the :file:`nrf_semmc.h` file. It contains a list of supported and tested EMMC commands.
+   The main interface for sEMMC is the :file:`nrf_semmc.h` file.
+   It contains a list of supported and tested EMMC commands.
 
 Header files
 ============
 
-For an sEMMC application to function correctly, it requires specific header files used by the driver code (internal paths) and specific header files for nrfx (external dependencies).
+sEMMC application requires specific header files used by the driver code (internal paths) and specific header files for nrfx (external dependencies).
 You must include paths to these files in the build environment's list of include paths.
 The following list is a detailed breakdown of the necessary paths:
 
@@ -64,7 +65,6 @@ The following list is a detailed breakdown of the necessary paths:
      For example, the :file:`nrfx_glue.h`, :file:`nrfx_log.h`, or a configuration header file.
      See an example configuration for the :file:`nrfx_config.h` file (valid for all nRF54L Series devices):
 
-
 .. code-block:: c
 
    #ifndef NRFX_CONFIG_H__
@@ -79,17 +79,15 @@ The following list is a detailed breakdown of the necessary paths:
 
    #endif // NRFX_CONFIG_H__
 
-
 Compiling source files
 ======================
 
-For an sEMMC application to function properly, you must compile the driver implementation from the source file, i.e., include :file:`nrf_semmc.c` at the top of your application.
+For an sEMMC application to function properly, you must compile the driver implementation from the source file by including :file:`nrf_semmc.c` at the top of your application.
 
 Application core and FLPR configuration
 ***************************************
 
 You must adjust the settings for the nRF54L Series SoC to run at highest base clock frequency.
-
 To work with any of the following settings, ensure you have completed the following:
 
 * You have allocated memory for the data pointers used by the sEMMC driver.
@@ -196,29 +194,29 @@ This code snippet shows how you can set up these pins in your application:
 High speed transfers
 ====================
 
-To enable communcation at 32MHz on an nRF54L Series device you need to set the bias of the GPIOHSPADCTRL module. The following code snippet shows how you can set the value in your application:
+To enable communcation at 32MHz on an nRF54L Series device, you need to set the bias of the GPIOHSPADCTRL module.
+The following code snippet shows how you can set the value in your application:
 
 .. code-block:: c
 
-   gpiohs_bias_val = 0x2; 
+   gpiohs_bias_val = 0x2;
    NRF_GPIOHSPADCTRL->BIAS = gpiohs_bias_val;
 
-
 Memory retention configuration
 ******************************
 
 The sEMMC soft peripheral requires RAM retention in order to go into the lowest power consumption mode, which can be called through the :c:func:`nrf_semmc_disable` function.
 
 Assuming there is an access to the peripheral ``MEMCONF``, the following code snippet illustrates how to enable FLPR RAM retention, followed by disabling and re-enabling, and finally how to disable RAM retention:
 
- .. code-block:: c
+.. code-block:: c
 
-    // Disable sequence
-    nrf_memconf_ramblock_ret_enable_set(NRF_MEMCONF, 1, MEMCONF_POWER_RET_MEM0_Pos, true);
-    nrf_semmc_disable(&m_semmc);
-    // Enable sequence
-    nrf_semmc_enable(&m_semmc);
-    nrf_memconf_ramblock_ret_enable_set(NRF_MEMCONF, 1, MEMCONF_POWER_RET_MEM0_Pos, false);
+  // Disable sequence
+  nrf_memconf_ramblock_ret_enable_set(NRF_MEMCONF, 1, MEMCONF_POWER_RET_MEM0_Pos, true);
+  nrf_semmc_disable(&m_semmc);
+  // Enable sequence
+  nrf_semmc_enable(&m_semmc);
+  nrf_memconf_ramblock_ret_enable_set(NRF_MEMCONF, 1, MEMCONF_POWER_RET_MEM0_Pos, false);
 
 .. _semmc_nrf54L_series_porting_guide_ram_configuration:
 
@@ -231,63 +229,59 @@ The sEMMC Soft Peripheral operates from RAM.
    sEMMC supports Position Independent Code (PIC).
    This allows an application to determine where to load the Soft Peripheral firmware.
 
-
 Your build environment must reserve the required RAM and ensure that it is readable and writable by both the application core and the FLPR core.
-These tables details the memory regions needed for your nRF54L Series device:
-
-
-   .. tabs::
-
-      .. tab:: **nRF54L15**
-
-         .. list-table:: nRF54L15 RAM Configuration Table
-            :widths: auto
-            :header-rows: 1
-
-            * - Component
-              - Address offset
-              - Size
-            * - sEMMC firmware
-              - `SP_FIRMWARE_ADDR`
-              - 0x3C00
-            * - sEMMC execution RAM
-              - `SP_FIRMWARE_ADDR` + 0x3C00
-              - 0x600
-            * - sEMMC virtual register interface
-              - `SP_FIRMWARE_ADDR` + 0x4200
-              - 0x200
-            * - Context saving
-              - 0x2003FE00
-              - 0x200 (but the entire block should be retained)
-
-      .. tab:: **nRF54LM20**
-
-         .. list-table:: nRF54LM20 RAM Configuration Table
-            :widths: auto
-            :header-rows: 1
-
-            * - Component
-              - Address offset
-              - Size
-            * - sEMMC firmware
-              - `SP_FIRMWARE_ADDR`
-              - 0x3C00
-            * - sEMMC execution RAM
-              - `SP_FIRMWARE_ADDR` + 0x3C00
-              - 0x600
-            * - sEMMC virtual register interface
-              - `SP_FIRMWARE_ADDR` + 0x4200
-              - 0x200
-            * - Context saving
-              - 0x2007FD40
-              - 0x200 (but the entire block should be retained)
-
+The following table details the memory regions required for your nRF54L Series device:
+
+.. tabs::
+
+  .. tab:: **nRF54L15**
+
+      .. list-table:: nRF54L15 RAM Configuration Table
+        :widths: auto
+        :header-rows: 1
+
+        * - Component
+          - Address offset
+          - Size
+        * - sEMMC firmware
+          - ``SP_FIRMWARE_ADDR``
+          - 0x3C00
+        * - sEMMC execution RAM
+          - ``SP_FIRMWARE_ADDR`` + 0x3C00
+          - 0x600
+        * - sEMMC virtual register interface
+          - ``SP_FIRMWARE_ADDR`` + 0x4200
+          - 0x200
+        * - Context saving
+          - 0x2003FE00
+          - 0x200 (but the entire block should be retained)
+
+  .. tab:: **nRF54LM20**
+
+      .. list-table:: nRF54LM20 RAM Configuration Table
+        :widths: auto
+        :header-rows: 1
+
+        * - Component
+          - Address offset
+          - Size
+        * - sEMMC firmware
+          - ``SP_FIRMWARE_ADDR``
+          - 0x3C00
+        * - sEMMC execution RAM
+          - ``SP_FIRMWARE_ADDR`` + 0x3C00
+          - 0x600
+        * - sEMMC virtual register interface
+          - ``SP_FIRMWARE_ADDR`` + 0x4200
+          - 0x200
+        * - Context saving
+          - 0x2007FD40
+          - 0x200 (but the entire block should be retained)
 
 The build environment described in the :ref:`semmc_nrf54l_series_porting_guide_code` section must comply with these requirements.
 This includes proper settings in linker scripts, device tree specifications (DTS), and resource allocation.
 
-
-To initialize the sEMMC struct on an nRF54L Series device you can use the following lines:
+To initialize the sEMMC struct on an nRF54L Series device, use the following lines:
 
  .. code-block:: c
 
@@ -297,8 +291,8 @@ To initialize the sEMMC struct on an nRF54L Series device you can use the follow
     static nrf_semmc_t m_semmc = {.p_reg = (void *)SP_REGIF_BASE, .drv_inst_idx = 0};
 
 Ensure that ``SP_FIRMWARE_ADDR`` is set so that it does not overlap with the context saving address.
-For nRF54L Series devices the firmware is usually placed before the context saving address. This means that
-``SP_FIRMWARE_ADDR`` plus the component sizes in the table above must be a lower value than the context saving address.
+For nRF54L Series devices, the firmware is placed before the context saving address.
+This means, that ``SP_FIRMWARE_ADDR`` plus the component sizes listed in the table must be of a lower value than the context saving address.
 
 The values in the table below have been tested and are considered production-ready for ``SP_FIRMWARE_ADDR``:
 
@@ -319,10 +313,16 @@ The values in the table below have been tested and are considered production-rea
 Read responses
 **************
 
-sEMMC is not able to process read data and response at the same time, as mentioned in :ref:`semmc_limitations`. There are a couple of things that can be done to mitigate this.
 
-The preferred way to do reads is to first do the read as normal and process the response with :c:var:`nrf_semmc_config_t.process_response` set to `NRF_EMMC_RESPONSE_PROC_PROCESS`.
-The response is returned in :c:var:`nrf_semmc_cmd_desc_t.err`. If the response is `NRF_SEMMC_SUCCESS` the read was successful. If any other response is returned, you would
-need to do a second read and ignore the response with :c:var:`nrf_semmc_config_t.process_response` set to `NRF_EMMC_RESPONSE_PROC_IGNORE`.
+Read responses
+**************
+
+sEMMC cannot process read data and response at the same time (see the :ref:`semmc_limitations`).
+However, you can mitigate it in the following ways:
+
+* The recommended way is to perform the read operation with the :c:var:`nrf_semmc_config_t.process_response` variable set to ``NRF_EMMC_RESPONSE_PROC_PROCESS``.
+  The response is available in the :c:var:`nrf_semmc_cmd_desc_t.err` variable.
+  If the response is ``NRF_SEMMC_SUCCESS``, the read was successful.
+  If you receive a different response, retry the read operation, this time with the :c:var:`nrf_semmc_config_t.process_response` variable set to ``NRF_EMMC_RESPONSE_PROC_IGNORE``.
 
-The other is doing the wanted read command first with :c:var:`nrf_semmc_config_t.process_response` set to `NRF_EMMC_RESPONSE_PROC_IGNORE` followed by a CMD13 to ensure the status is correct.
+* Alternatively, you can perform the read operation with the :c:var:`nrf_semmc_config_t.process_response` variable set to ``NRF_EMMC_RESPONSE_PROC_IGNORE``, and then follow it with a CMD13 command to verify if the status is correct.

softperipheral/doc/sQSPI/sqspi_nrf54H_series_porting_v1_2_0.rst

@@ -198,7 +198,7 @@ For example, you might need to change the pin drive strength to guarantee signal
 
 .. note::
    When using a custom PCB with the nRF54H20 device you might need to match the output impedance on the port you are using.
-   Refer to the :ref:`ug_nrf54h20_custom_pcb` page for details.
+   Refer to the :ref:`nrf:ug_nrf54h20_custom_pcb` page for details.
 
 You must address these cases on the sQSPI application code: