tests: align mcuboot configuration in test app

[KRKNWK-19763]

Signed-off-by: Krzysztof Taborowski <[email protected]>

Author: ktaborowski

tests/manual/simple_bootloader/Kconfig.sysbuild

@@ -10,6 +10,11 @@ endchoice
 
 if BOOTLOADER_MCUBOOT
 
+# Downgrade prevention
+choice MCUBOOT_MODE
+	default MCUBOOT_MODE_OVERWRITE_ONLY
+endchoice
+
 config DFU_MULTI_IMAGE_PACKAGE_BUILD
 	default y
 
@@ -27,10 +32,6 @@ config NRF_DEFAULT_EMPTY
 config MCUBOOT_UPDATEABLE_IMAGES
 	default 2
 
-choice MCUBOOT_MODE
-	default MCUBOOT_MODE_OVERWRITE_ONLY
-endchoice
-
 choice BOOT_SIGNATURE_TYPE
 	default BOOT_SIGNATURE_TYPE_RSA
 endchoice

tests/manual/simple_bootloader/boards/nrf54l15dk_nrf54l10_cpuapp.conf

@@ -0,0 +1,15 @@
+#
+# Copyright (c) 2024 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+
+CONFIG_POWEROFF=y
+
+# nRF54L15DK uses SPI NOR external flash for DFU
+CONFIG_FLASH=y
+CONFIG_SPI=y
+CONFIG_SPI_NOR=y
+CONFIG_MULTITHREADING=y
+CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y
+CONFIG_MCUMGR_GRP_IMG_ALLOW_ERASE_PENDING=y

tests/manual/simple_bootloader/boards/nrf54l15dk_nrf54l10_cpuapp.overlay

@@ -3,9 +3,6 @@
  *
  * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
  */
-
-
-/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
 &cpuapp_rram {
 	reg = <0x0 DT_SIZE_K(1024)>;
 };
@@ -14,3 +11,18 @@
 	reg = <0x20000000 DT_SIZE_K(192)>;
 	ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
 };
+
+/ {
+	chosen {
+		nordic,pm-ext-flash = &mx25r64;
+	};
+};
+
+&mx25r64 {
+	status = "okay";
+};
+
+// TODO: re-enable HWFC once it's fixed
+&uart20 {
+	/delete-property/ hw-flow-control;
+};

tests/manual/simple_bootloader/pm_static_nrf54l15dk_nrf54l10_cpuapp.yml

@@ -1,54 +1,51 @@
 app:
-  address: 0xc800
-  end_address: 0x84800
+  address: 0xd800
+  end_address: 0xfd000
   region: flash_primary
-  size: 0x78000
+  size: 0xef800
 mcuboot:
   address: 0x0
-  end_address: 0xc000
+  end_address: 0xd000
   placement:
     before:
     - mcuboot_primary
   region: flash_primary
-  size: 0xc000
+  size: 0xd000
 mcuboot_pad:
-  address: 0xc000
-  end_address: 0xc800
+  address: 0xd000
+  end_address: 0xd800
   placement:
     before:
     - mcuboot_primary_app
   region: flash_primary
   size: 0x800
 mcuboot_primary:
-  address: 0xc000
-  end_address: 0x84800
+  address: 0xd000
+  end_address: 0xfd000
   orig_span: &id001
   - mcuboot_pad
   - app
   region: flash_primary
-  sharers: 0x1
-  size: 0x78800
+  size: 0xf0000
   span: *id001
 mcuboot_primary_app:
-  address: 0xc800
-  end_address: 0x84800
+  address: 0xd800
+  end_address: 0xfd000
   orig_span: &id002
   - app
   region: flash_primary
-  size: 0x78000
+  size: 0xef800
   span: *id002
 mcuboot_secondary:
-  address: 0x84800
-  end_address: 0xfd000
+  address: 0x0
+  end_address: 0xf0000
   placement:
-    after:
-    - mcuboot_primary
     align:
-      start: 0x1000
-  region: flash_primary
+      start: 0x4
+  region: external_flash
   share_size:
   - mcuboot_primary
-  size: 0x78800
+  size: 0xf0000
 mfg_storage:
   address: 0xff000
   end_address: 0x100000

tests/manual/simple_bootloader/sysbuild/mcuboot/boards/nrf52840dk_nrf52840.conf

@@ -0,0 +1,15 @@
+#
+# Copyright (c) 2023 Nordic Semiconductor ASA
+#
+# SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
+#
+
+# Configure QSPI for external flash
+CONFIG_NORDIC_QSPI_NOR=y
+CONFIG_NORDIC_QSPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
+CONFIG_NORDIC_QSPI_NOR_STACK_WRITE_BUFFER_SIZE=16
+
+# Disable the Flash Patch and Breakpoint (FPB) feature
+# to increase the security of the device.
+CONFIG_DISABLE_FLASH_PATCH=y
+CONFIG_REBOOT=y

tests/manual/simple_bootloader/sysbuild/mcuboot/boards/nrf5340dk_nrf5340_cpuapp.conf

@@ -22,7 +22,4 @@ CONFIG_FLASH_SIMULATOR=y
 CONFIG_FLASH_SIMULATOR_DOUBLE_WRITES=y
 CONFIG_FLASH_SIMULATOR_STATS=n
 
-# Enable custom command to erase settings partition.
-CONFIG_ENABLE_MGMT_PERUSER=y
 CONFIG_ZCBOR=y
-CONFIG_BOOT_MGMT_CUSTOM_STORAGE_ERASE=y

tests/manual/simple_bootloader/sysbuild/mcuboot/boards/nrf54l15dk_nrf54l10_cpuapp.conf

@@ -1,54 +1,37 @@
 #
-# Copyright (c) 2021 Nordic Semiconductor ASA
+# Copyright (c) 2024 Nordic Semiconductor ASA
 #
 # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
 #
 
 # TODO: NCSDK-28931: Cannot use fprotect twice, so disable it in MCUboot to
-# test protecting Matter factory data. It can be enabled while there is a support
+# test protecting factory data. It can be enabled while there is a support
 # for protection more than one region.
 CONFIG_FPROTECT=n
+
 # TODO: Workaround, disable memory guard to avoid false faults in application after boot
 CONFIG_HW_STACK_PROTECTION=n
 
-CONFIG_BOOT_WATCHDOG_FEED=n
-
-# Disable all debug features
-CONFIG_USE_SEGGER_RTT=n
-CONFIG_SHELL=n
-CONFIG_OPENTHREAD_SHELL=n
-CONFIG_CONSOLE=n
-CONFIG_UART_CONSOLE=n
-CONFIG_SERIAL=n
-CONFIG_LOG=n
-CONFIG_LOG_MODE_MINIMAL=n
-CONFIG_ASSERT_VERBOSE=n
-CONFIG_ASSERT_NO_FILE_INFO=y
-CONFIG_PRINTK=n
-CONFIG_PRINTK_SYNC=n
-CONFIG_THREAD_NAME=n
-CONFIG_BOOT_BANNER=n
-
-CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y
-
-# Ensure that the qspi driver is disabled by default
-CONFIG_GPIO=n
-CONFIG_SPI=n
-CONFIG_SPI_NOR=n
-CONFIG_NORDIC_QSPI_NOR=n
-CONFIG_MULTITHREADING=n
-
-CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y
-
-
-# Workaroud: fprotect and watchdog feed
-# are not supported in NCS v2.6.0
-CONFIG_FPROTECT=n
-CONFIG_BOOT_WATCHDOG_FEED=n
-
 # Currently, without tickless kernel, the SYSCOUNTER value after the software
 # reset is not set properly and due to that the first system interrupt is not called
 # in the proper time - the SYSCOUNTER value is set to the value from before
 # reset + 1. Hence, the reboot time increases more and more.
 # To avoid it enable tickles kernel for mcuboot.
 CONFIG_TICKLESS_KERNEL=y
+
+CONFIG_BOOT_WATCHDOG_FEED=n
+
+# nRF54L15DK uses SPI NOR external flash
+CONFIG_GPIO=y
+CONFIG_SPI=y
+CONFIG_SPI_NOR=y
+CONFIG_SPI_NOR_SFDP_DEVICETREE=y
+CONFIG_SPI_NOR_FLASH_LAYOUT_PAGE_SIZE=4096
+CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y
+
+# required by SPI driver
+CONFIG_MULTITHREADING=y
+
+# Activate LTO
+CONFIG_LTO=y
+CONFIG_ISR_TABLES_LOCAL_DECLARATION=y

tests/manual/simple_bootloader/sysbuild/mcuboot/boards/nrf54l15dk_nrf54l10_cpuapp.overlay

@@ -4,8 +4,13 @@
  * SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
  */
 
+/ {
+	chosen {
+		nordic,pm-ext-flash = &mx25r64;
+	};
+};
 
-/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
+/* Application does not use cpuflpr core. Assign whole RRAM and RAM to cpuapp. */
 &cpuapp_rram {
 	reg = <0x0 DT_SIZE_K(1024)>;
 };
@@ -14,3 +19,7 @@
 	reg = <0x20000000 DT_SIZE_K(192)>;
 	ranges = <0x0 0x20000000 DT_SIZE_K(192)>;
 };
+
+&mx25r64 {
+	status = "okay";
+};

tests/manual/simple_bootloader/sysbuild/mcuboot/boards/nrf54l15dk_nrf54l15_cpuapp.conf

@@ -1,54 +1,29 @@
 #
-# Copyright (c) 2021 Nordic Semiconductor ASA
+# Copyright (c) 2024 Nordic Semiconductor ASA
 #
 # SPDX-License-Identifier: LicenseRef-Nordic-5-Clause
 #
 
 # TODO: NCSDK-28931: Cannot use fprotect twice, so disable it in MCUboot to
-# test protecting Matter factory data. It can be enabled while there is a support
+# test protecting factory data. It can be enabled while there is a support
 # for protection more than one region.
 CONFIG_FPROTECT=n
+
 # TODO: Workaround, disable memory guard to avoid false faults in application after boot
 CONFIG_HW_STACK_PROTECTION=n
 
-CONFIG_BOOT_WATCHDOG_FEED=n
+# Currently, without tickless kernel, the SYSCOUNTER value after the software
+# reset is not set properly and due to that the first system interrupt is not called
+# in the proper time - the SYSCOUNTER value is set to the value from before
+# reset + 1. Hence, the reboot time increases more and more.
+# To avoid it enable tickles kernel for mcuboot.
+CONFIG_TICKLESS_KERNEL=y
 
-# Disable all debug features
-CONFIG_USE_SEGGER_RTT=n
-CONFIG_SHELL=n
-CONFIG_OPENTHREAD_SHELL=n
-CONFIG_CONSOLE=n
-CONFIG_UART_CONSOLE=n
-CONFIG_SERIAL=n
-CONFIG_LOG=n
-CONFIG_LOG_MODE_MINIMAL=n
-CONFIG_ASSERT_VERBOSE=n
-CONFIG_ASSERT_NO_FILE_INFO=y
-CONFIG_PRINTK=n
-CONFIG_PRINTK_SYNC=n
-CONFIG_THREAD_NAME=n
-CONFIG_BOOT_BANNER=n
+CONFIG_BOOT_WATCHDOG_FEED=n
 
 CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y
 
 # Ensure that the qspi driver is disabled by default
-CONFIG_GPIO=n
 CONFIG_SPI=n
 CONFIG_SPI_NOR=n
 CONFIG_NORDIC_QSPI_NOR=n
-CONFIG_MULTITHREADING=n
-
-CONFIG_PM_OVERRIDE_EXTERNAL_DRIVER_CHECK=y
-
-
-# Workaroud: fprotect and watchdog feed
-# are not supported in NCS v2.6.0
-CONFIG_FPROTECT=n
-CONFIG_BOOT_WATCHDOG_FEED=n
-
-# Currently, without tickless kernel, the SYSCOUNTER value after the software
-# reset is not set properly and due to that the first system interrupt is not called
-# in the proper time - the SYSCOUNTER value is set to the value from before
-# reset + 1. Hence, the reboot time increases more and more.
-# To avoid it enable tickles kernel for mcuboot.
-CONFIG_TICKLESS_KERNEL=y

tests/manual/simple_bootloader/sysbuild/mcuboot/boards/nrf54l15dk_nrf54l15_cpuapp.overlay

@@ -5,7 +5,7 @@
  */
 
 
-/* Application does not use cpuflpr core. Assign whole RRAM to cpuapp. */
+/* Application does not use cpuflpr core. Assign whole RRAM and RAM to cpuapp. */
 &cpuapp_rram {
 	reg = < 0x0 DT_SIZE_K(1524) >;
 };
@@ -14,3 +14,35 @@
 	reg = <0x20000000 DT_SIZE_K(256)>;
 	ranges = <0x0 0x20000000  0x40000>;
 };
+
+&adc {
+	status = "disabled";
+};
+&uart21 {
+	status = "disabled";
+};
+&pwm20 {
+	status = "disabled";
+};
+&i2c20 {
+	status = "disabled";
+};
+&spi00 {
+	status = "disabled";
+};
+&spi20 {
+	status = "disabled";
+};
+&spi21 {
+	status = "disabled";
+};
+&spi22 {
+	status = "disabled";
+};
+
+/* Disable the external flash, as it's not needed
+for the configuration with secondary slot residing
+in the internal MRAM. */
+&mx25r64 {
+	status = "disabled";
+};