66
77#include "adc_context.h"
88#include <nrfx_saadc.h>
9- #include <zephyr/dt-bindings/adc/nrf-saadc-v3.h>
10- #include <zephyr/dt-bindings/adc/nrf-saadc-nrf54l.h>
11- #include <zephyr/dt-bindings/adc/nrf-saadc-haltium.h>
9+ #include <zephyr/dt-bindings/adc/nrf-saadc.h>
1210#include <zephyr/linker/devicetree_regions.h>
1311#include <zephyr/logging/log.h>
1412#include <zephyr/irq.h>
@@ -18,91 +16,22 @@ LOG_MODULE_REGISTER(adc_nrfx_saadc, CONFIG_ADC_LOG_LEVEL);
1816
1917#define DT_DRV_COMPAT nordic_nrf_saadc
2018
21- #if (NRF_SAADC_HAS_AIN_AS_PIN )
22-
23- #if defined(CONFIG_NRF_PLATFORM_HALTIUM )
24- static const uint32_t saadc_psels [NRF_SAADC_AIN13 + 1 ] = {
25- [NRF_SAADC_AIN0 ] = NRF_PIN_PORT_TO_PIN_NUMBER (0U , 1 ),
26- [NRF_SAADC_AIN1 ] = NRF_PIN_PORT_TO_PIN_NUMBER (1U , 1 ),
27- [NRF_SAADC_AIN2 ] = NRF_PIN_PORT_TO_PIN_NUMBER (2U , 1 ),
28- [NRF_SAADC_AIN3 ] = NRF_PIN_PORT_TO_PIN_NUMBER (3U , 1 ),
29- [NRF_SAADC_AIN4 ] = NRF_PIN_PORT_TO_PIN_NUMBER (4U , 1 ),
30- [NRF_SAADC_AIN5 ] = NRF_PIN_PORT_TO_PIN_NUMBER (5U , 1 ),
31- [NRF_SAADC_AIN6 ] = NRF_PIN_PORT_TO_PIN_NUMBER (6U , 1 ),
32- [NRF_SAADC_AIN7 ] = NRF_PIN_PORT_TO_PIN_NUMBER (7U , 1 ),
33- [NRF_SAADC_AIN8 ] = NRF_PIN_PORT_TO_PIN_NUMBER (0U , 9 ),
34- [NRF_SAADC_AIN9 ] = NRF_PIN_PORT_TO_PIN_NUMBER (1U , 9 ),
35- [NRF_SAADC_AIN10 ] = NRF_PIN_PORT_TO_PIN_NUMBER (2U , 9 ),
36- [NRF_SAADC_AIN11 ] = NRF_PIN_PORT_TO_PIN_NUMBER (3U , 9 ),
37- [NRF_SAADC_AIN12 ] = NRF_PIN_PORT_TO_PIN_NUMBER (4U , 9 ),
38- [NRF_SAADC_AIN13 ] = NRF_PIN_PORT_TO_PIN_NUMBER (5U , 9 ),
39- };
40- #elif defined(CONFIG_SOC_NRF54L05 ) || defined(CONFIG_SOC_NRF54L10 ) || defined(CONFIG_SOC_NRF54L15 )
41- static const uint32_t saadc_psels [NRF_SAADC_DVDD + 1 ] = {
42- [NRF_SAADC_AIN0 ] = NRF_PIN_PORT_TO_PIN_NUMBER (4U , 1 ),
43- [NRF_SAADC_AIN1 ] = NRF_PIN_PORT_TO_PIN_NUMBER (5U , 1 ),
44- [NRF_SAADC_AIN2 ] = NRF_PIN_PORT_TO_PIN_NUMBER (6U , 1 ),
45- [NRF_SAADC_AIN3 ] = NRF_PIN_PORT_TO_PIN_NUMBER (7U , 1 ),
46- [NRF_SAADC_AIN4 ] = NRF_PIN_PORT_TO_PIN_NUMBER (11U , 1 ),
47- [NRF_SAADC_AIN5 ] = NRF_PIN_PORT_TO_PIN_NUMBER (12U , 1 ),
48- [NRF_SAADC_AIN6 ] = NRF_PIN_PORT_TO_PIN_NUMBER (13U , 1 ),
49- [NRF_SAADC_AIN7 ] = NRF_PIN_PORT_TO_PIN_NUMBER (14U , 1 ),
50- [NRF_SAADC_VDD ] = NRF_SAADC_INPUT_VDD ,
51- [NRF_SAADC_AVDD ] = NRF_SAADC_INPUT_AVDD ,
52- [NRF_SAADC_DVDD ] = NRF_SAADC_INPUT_DVDD ,
53- };
54- #elif defined(NRF54LM20A_ENGA_XXAA )
55- static const uint32_t saadc_psels [NRF_SAADC_DVDD + 1 ] = {
56- [NRF_SAADC_AIN0 ] = NRF_PIN_PORT_TO_PIN_NUMBER (0U , 1 ),
57- [NRF_SAADC_AIN1 ] = NRF_PIN_PORT_TO_PIN_NUMBER (31U , 1 ),
58- [NRF_SAADC_AIN2 ] = NRF_PIN_PORT_TO_PIN_NUMBER (30U , 1 ),
59- [NRF_SAADC_AIN3 ] = NRF_PIN_PORT_TO_PIN_NUMBER (29U , 1 ),
60- [NRF_SAADC_AIN4 ] = NRF_PIN_PORT_TO_PIN_NUMBER (6U , 1 ),
61- [NRF_SAADC_AIN5 ] = NRF_PIN_PORT_TO_PIN_NUMBER (5U , 1 ),
62- [NRF_SAADC_AIN6 ] = NRF_PIN_PORT_TO_PIN_NUMBER (4U , 1 ),
63- [NRF_SAADC_AIN7 ] = NRF_PIN_PORT_TO_PIN_NUMBER (3U , 1 ),
64- [NRF_SAADC_VDD ] = NRF_SAADC_INPUT_VDD ,
65- [NRF_SAADC_AVDD ] = NRF_SAADC_INPUT_AVDD ,
66- [NRF_SAADC_DVDD ] = NRF_SAADC_INPUT_DVDD ,
67- };
68- #elif defined(NRF54LV10A_ENGA_XXAA )
69- static const uint32_t saadc_psels [NRF_SAADC_AIN7 + 1 ] = {
70- [NRF_SAADC_AIN0 ] = NRF_PIN_PORT_TO_PIN_NUMBER (0U , 1 ),
71- [NRF_SAADC_AIN1 ] = NRF_PIN_PORT_TO_PIN_NUMBER (1U , 1 ),
72- [NRF_SAADC_AIN2 ] = NRF_PIN_PORT_TO_PIN_NUMBER (2U , 1 ),
73- [NRF_SAADC_AIN3 ] = NRF_PIN_PORT_TO_PIN_NUMBER (3U , 1 ),
74- [NRF_SAADC_AIN4 ] = NRF_PIN_PORT_TO_PIN_NUMBER (7U , 1 ),
75- [NRF_SAADC_AIN5 ] = NRF_PIN_PORT_TO_PIN_NUMBER (10U , 1 ),
76- [NRF_SAADC_AIN6 ] = NRF_PIN_PORT_TO_PIN_NUMBER (11U , 1 ),
77- [NRF_SAADC_AIN7 ] = NRF_PIN_PORT_TO_PIN_NUMBER (12U , 1 ),
78- };
79- #elif defined(NRF54LS05B_ENGA_XXAA )
80- static const uint32_t saadc_psels [NRF_SAADC_AIN3 + 1 ] = {
81- [NRF_SAADC_AIN0 ] = NRF_PIN_PORT_TO_PIN_NUMBER (4U , 1 ),
82- [NRF_SAADC_AIN1 ] = NRF_PIN_PORT_TO_PIN_NUMBER (5U , 1 ),
83- [NRF_SAADC_AIN2 ] = NRF_PIN_PORT_TO_PIN_NUMBER (6U , 1 ),
84- [NRF_SAADC_AIN3 ] = NRF_PIN_PORT_TO_PIN_NUMBER (7U , 1 ),
85- };
86- #endif
87-
88- #else
89- BUILD_ASSERT ((NRF_SAADC_AIN0 == NRF_SAADC_INPUT_AIN0 ) &&
90- (NRF_SAADC_AIN1 == NRF_SAADC_INPUT_AIN1 ) &&
91- (NRF_SAADC_AIN2 == NRF_SAADC_INPUT_AIN2 ) &&
92- (NRF_SAADC_AIN3 == NRF_SAADC_INPUT_AIN3 ) &&
93- (NRF_SAADC_AIN4 == NRF_SAADC_INPUT_AIN4 ) &&
94- (NRF_SAADC_AIN5 == NRF_SAADC_INPUT_AIN5 ) &&
95- (NRF_SAADC_AIN6 == NRF_SAADC_INPUT_AIN6 ) &&
96- (NRF_SAADC_AIN7 == NRF_SAADC_INPUT_AIN7 ) &&
19+ BUILD_ASSERT ((NRF_SAADC_AIN0 == NRFX_ANALOG_EXTERNAL_AIN0 ) &&
20+ (NRF_SAADC_AIN1 == NRFX_ANALOG_EXTERNAL_AIN1 ) &&
21+ (NRF_SAADC_AIN2 == NRFX_ANALOG_EXTERNAL_AIN2 ) &&
22+ (NRF_SAADC_AIN3 == NRFX_ANALOG_EXTERNAL_AIN3 ) &&
23+ (NRF_SAADC_AIN4 == NRFX_ANALOG_EXTERNAL_AIN4 ) &&
24+ (NRF_SAADC_AIN5 == NRFX_ANALOG_EXTERNAL_AIN5 ) &&
25+ (NRF_SAADC_AIN6 == NRFX_ANALOG_EXTERNAL_AIN6 ) &&
26+ (NRF_SAADC_AIN7 == NRFX_ANALOG_EXTERNAL_AIN7 ) &&
9727#if defined(SAADC_CH_PSELP_PSELP_VDDHDIV5 )
98- (NRF_SAADC_VDDHDIV5 == NRF_SAADC_INPUT_VDDHDIV5 ) &&
28+ (NRF_SAADC_VDDHDIV5 == NRFX_ANALOG_INTERNAL_VDDHDIV5 ) &&
9929#endif
10030#if defined(SAADC_CH_PSELP_PSELP_VDD )
101- (NRF_SAADC_VDD == NRF_SAADC_INPUT_VDD ) &&
31+ (NRF_SAADC_VDD == NRFX_ANALOG_INTERNAL_VDD ) &&
10232#endif
10333 1 ,
104- "Definitions from nrf-adc.h do not match those from nrf_saadc.h" );
105- #endif
34+ "Definitions from nrf-saadc.h do not match those from nrfx_analog_common.h" );
10635
10736struct driver_data {
10837 struct adc_context ctx ;
@@ -184,46 +113,6 @@ static int acq_time_set(nrf_saadc_channel_config_t *ch_cfg, uint16_t acquisition
184113 return 0 ;
185114}
186115
187- static int input_assign (nrf_saadc_input_t * pin_p ,
188- nrf_saadc_input_t * pin_n ,
189- const struct adc_channel_cfg * channel_cfg )
190- {
191- #if (NRF_SAADC_HAS_AIN_AS_PIN )
192- if (channel_cfg -> input_positive > ARRAY_SIZE (saadc_psels ) ||
193- channel_cfg -> input_positive < NRF_SAADC_AIN0 ) {
194- LOG_ERR ("Invalid analog positive input number: %d" , channel_cfg -> input_positive );
195- return - EINVAL ;
196- }
197-
198- * pin_p = saadc_psels [channel_cfg -> input_positive ];
199-
200- if (channel_cfg -> differential ) {
201- if (channel_cfg -> input_negative > ARRAY_SIZE (saadc_psels ) ||
202- (IS_ENABLED (CONFIG_NRF_PLATFORM_HALTIUM ) &&
203- (channel_cfg -> input_positive > NRF_SAADC_AIN7 ) !=
204- (channel_cfg -> input_negative > NRF_SAADC_AIN7 ))) {
205- LOG_ERR ("Invalid analog negative input number: %d" ,
206- channel_cfg -> input_negative );
207- return - EINVAL ;
208- }
209- * pin_n = channel_cfg -> input_negative == NRF_SAADC_GND ?
210- NRF_SAADC_INPUT_DISABLED :
211- saadc_psels [channel_cfg -> input_negative ];
212- } else {
213- * pin_n = NRF_SAADC_INPUT_DISABLED ;
214- }
215- #else
216- * pin_p = channel_cfg -> input_positive ;
217- * pin_n = (channel_cfg -> differential && (channel_cfg -> input_negative != NRF_SAADC_GND ))
218- ? channel_cfg -> input_negative
219- : NRF_SAADC_INPUT_DISABLED ;
220- #endif
221- LOG_DBG ("ADC positive input: %d" , * pin_p );
222- LOG_DBG ("ADC negative input: %d" , * pin_n );
223-
224- return 0 ;
225- }
226-
227116static int gain_set (nrf_saadc_channel_config_t * ch_cfg , enum adc_gain gain )
228117{
229118#if NRF_SAADC_HAS_CH_GAIN
@@ -333,6 +222,11 @@ static int adc_nrfx_channel_setup(const struct device *dev,
333222#endif
334223 },
335224 .channel_index = channel_cfg -> channel_id ,
225+ .pin_p = channel_cfg -> input_positive ,
226+ .pin_n = (channel_cfg -> differential &&
227+ (channel_cfg -> input_negative != NRF_SAADC_GND ))
228+ ? channel_cfg -> input_negative
229+ : NRF_SAADC_AIN_DISABLED ,
336230 };
337231
338232 if (channel_cfg -> channel_id >= SAADC_CH_NUM ) {
@@ -342,11 +236,6 @@ static int adc_nrfx_channel_setup(const struct device *dev,
342236
343237 ch_cfg = & cfg .channel_config ;
344238
345- err = input_assign (& cfg .pin_p , & cfg .pin_n , channel_cfg );
346- if (err != 0 ) {
347- return err ;
348- }
349-
350239 err = gain_set (ch_cfg , channel_cfg -> gain );
351240 if (err != 0 ) {
352241 return err ;
@@ -803,38 +692,9 @@ static DEVICE_API(adc, adc_nrfx_driver_api) = {
803692#ifdef CONFIG_ADC_ASYNC
804693 .read_async = adc_nrfx_read_async ,
805694#endif
806- #if defined(NRF54LV10A_ENGA_XXAA )
807- .ref_internal = 1300 ,
808- #elif defined(CONFIG_SOC_COMPATIBLE_NRF54LX )
809- .ref_internal = 900 ,
810- #elif defined(CONFIG_NRF_PLATFORM_HALTIUM )
811- .ref_internal = 1024 ,
812- #else
813- .ref_internal = 600 ,
814- #endif
695+ .ref_internal = NRFX_SAADC_REF_INTERNAL_VALUE ,
815696};
816697
817- #if defined(CONFIG_NRF_PLATFORM_HALTIUM )
818- /* AIN8-AIN14 inputs are on 3v3 GPIO port and they cannot be mixed with other
819- * analog inputs (from 1v8 ports) in differential mode.
820- */
821- #define CH_IS_3V3 (val ) (val >= NRF_SAADC_AIN8)
822-
823- #define MIXED_3V3_1V8_INPUTS (node ) \
824- (DT_NODE_HAS_PROP(node, zephyr_input_negative) && \
825- (CH_IS_3V3(DT_PROP_OR(node, zephyr_input_negative, 0)) != \
826- CH_IS_3V3(DT_PROP_OR(node, zephyr_input_positive, 0))))
827- #else
828- #define MIXED_3V3_1V8_INPUTS (node ) false
829- #endif
830-
831- #define VALIDATE_CHANNEL_CONFIG (node ) \
832- BUILD_ASSERT(MIXED_3V3_1V8_INPUTS(node) == false, \
833- "1v8 inputs cannot be mixed with 3v3 inputs");
834-
835- /* Validate configuration of all channels. */
836- DT_FOREACH_CHILD (DT_DRV_INST (0 ), VALIDATE_CHANNEL_CONFIG )
837-
838698NRF_DT_CHECK_NODE_HAS_REQUIRED_MEMORY_REGIONS (DT_DRV_INST (0 ));
839699
840700DEVICE_DT_INST_DEFINE (0 , init_saadc , NULL , NULL , NULL , POST_KERNEL ,
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